Sat, 06 Aug 2011 01:48:48 +0100
Update to LM32 DMA v3.3
+// Version : 3.2
+// : 1. Support for 8/32-bit WISHBONE Data Bus. The Control and
+// : Read/Write Ports can be independently configured.
+// : 2. Support for "retry" on receipt of a WISHBONE RTY. This
+// : retry results in the current burst or classic cycle
+// : being issued again after a retry timeout.
+// : 3. Support for "error" on receipt of a WISHBONE ERR. This
+// : results in the current dma transfer being terminated
+// : and the error is updated within the STATUS CSR.
+// : 4. Support for burst size of 64.
+// :
+// Version : 3.3
+// : Support for MachXO2 added. The MachXO2 only has a FIFO
+// : with separate read/write clocks.
1 <?xml version="1.0" encoding="UTF-8"?>
2 <Component Name="wb_dma_ctrl" Text="DMA" Type="IO" Ver="3.3" Help="wb_dma_ctrl\document\dma.htm" Processor="LM32,LM8" LatticeFamily="All" Device="All">
3 <MasterSlavePorts>
4 <MasterPort Prefix="MA" Port="MA" Name="Read Master Port" Type="DMAR" Priority="2"/>
5 <MasterPort Prefix="MB" Port="MB" Name="Write Master Port" Type="DMAW" Priority="3"/>
6 <SlavePort Prefix="S" Port="S" Name="Control Port" Type="DATA"/>
7 </MasterSlavePorts>
8 <ClockPort Name="CLK_I " Description="Clock one"/>
9 <ResetPort Name="RST_I " Description="Reset"/>
10 <Interrupt Name="S_INT_O" Active="high" IRQ=""/>
11 <Files>
12 <File Name="../components/wb_dma_ctrl/rtl/verilog/master_ctrl.v" />
13 <File Name="../components/wb_dma_ctrl/rtl/verilog/slave_reg.v" />
14 <File Name="../components/wb_dma_ctrl/rtl/verilog/wb_dma_ctrl.v" />
15 </Files>
16 <DeviceDriver InitRoutine="MicoDMAInit" StructName="MicoDMACtx_t">
17 <DDInclude Include="LookupServices.h" Processor="LM32"/>
18 <DDInclude Include="stddef.h" Processor="LM8"/>
19 <DDIRQ IRQAPI="MicoDMAISR" Parameter="InstanceName" Include="MicoDMA.h" Processor="LM8"/>
20 <DDPreProcessor Name="__MICODMA_USER_IRQ_HANDLER__" Processor="LM8"/>
21 <DDstruct>
22 <DDSElem MemberName="name" MemberType="const char*" Type = "Parm" Value="InstanceName" Format="string" Processor="LM32,LM8"/>
23 <DDSElem MemberName="base" MemberType="unsigned int" Type="Parm" Value="BASE_ADDRESS" Port="S" Processor="LM32"/>
24 <DDSElem MemberName="base" MemberType="size_t" Type="Parm" Value="BASE_ADDRESS" Port="S" Processor="LM8"/>
25 <DDSElem MemberName="wb" MemberType="unsigned char" Type="Parm" Value="WB_DAT_WIDTH" Port="S"/>
26 <DDSElem MemberName="lookupReg" MemberType="DeviceReg_t" Type="uninitialized" Value="" Processor="LM32"/>
27 <DDSElem MemberName="irq" MemberType="unsigned int" Type="Interrupt" Value="IRQ_LEVEL" Processor="LM32"/>
28 <DDSElem MemberName="irq" MemberType="unsigned char" Type="Interrupt" Value="IRQ_LEVEL" Processor="LM8"/>
29 <DDSElem MemberName="maxLength" MemberType="unsigned int" Type="Parm" Value="LENGTH_WIDTH" Processor="LM32"/>
30 <DDSElem MemberName="flags" MemberType="unsigned int" Type="uninitialized" Value="" Processor="LM32"/>
31 <DDSElem MemberName="pCurr" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/>
32 <DDSElem MemberName="pHead" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/>
33 <DDSElem MemberName="prev" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/>
34 <DDSElem MemberName="next" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/>
35 </DDstruct>
36 </DeviceDriver>
37 <PMIDef>
38 <Module Name="pmi_fifo" />
39 <Module Name="pmi_fifo_dc" />
40 </PMIDef>
41 <Parms>
42 <Parm Name="InstanceName" Value="dma" Type="string" isiname="true" Text="Instance Name"/>
43 <Parm Name="BASE_ADDRESS" Port="S" Value="0x80000000" Type="Integer" isba="true" Text="Base Address"/>
44 <Parm Name="FIFO_IMPLEMENTATION" Value="EBR" Type="String" ListValues="EBR,LUT" Text="FIFO Implementation" isparm="true"/>
45 <Parm Name="SIZE" Port="S" Value="128" Type="Integer" issize="true" Text="Size" Enable="false"/>
46 <Parm Name="DISABLE" Value="undef" Type="define" isdisable="true" Text="Disable Component"/>
47 <Parm Name="ADDRESS_LOCK" Value="undef" Type="Define" Text="Lock Address "/>
48 <Parm Name="RETRY_TIMEOUT" Value="16" Type="Integer" ValueRange="1-255" Text="Retry Timeout" isparm="true"/>
49 <Parm Name="LENGTH_WIDTH" Value="32" Type="Integer" ValueRange="1-32" Text="Length Width" isparm="false"/>
50 <Parm Name="WB_DAT_WIDTH" Port="S" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="Control Port Data Bus Width" isparm="true"/>
51 <Parm Name="WB_ADR_WIDTH" Port="S" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/>
52 <Parm Name="WB_DAT_WIDTH" Port="MA" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="Read/Write Ports Data Bus Width" isparm="true" SetValTo="MB"/>
53 <Parm Name="WB_ADR_WIDTH" Port="MA" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/>
54 <Parm Name="WB_DAT_WIDTH" Port="MB" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="WISHBONE Data Bus Width" isparm="true"/>
55 <Parm Name="WB_ADR_WIDTH" Port="MB" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/>
56 </Parms>
57 <GUIS Columns="2" Help="document\dma.htm" Name="WB_DMA_CTRL">
58 <GUI Widget="Text" Span="1" Name="InstanceName" Width="40"/>
59 <GUI Widget="Text" Span="1" Name="BASE_ADDRESS" Port="S"/>
60 <GUI Widget="Combo" Span="1" Name="FIFO_IMPLEMENTATION"/>
61 <GUI Widget="Group" Span="2" Name="SETTINGS" Text="Settings" Columns="3"/>
62 <GUI Widget="Label" Span="1" Name=""/>
63 <GUI Widget="Spinner" Span="1" Name="RETRY_TIMEOUT"/>
64 <GUI Widget="Group" Span="2" Text="WISHBONE Configuration" Columns="2"/>
65 <GUI Widget="Combo" Span="1" Name="WB_DAT_WIDTH" Port="S"/>
66 <GUI Widget="Combo" Span="1" Name="WB_DAT_WIDTH" Port="MA"/>
67 </GUIS>
68 </Component>