Sat, 06 Aug 2011 01:48:48 +0100
Update to LM32 DMA v3.3
+// Version : 3.2
+// : 1. Support for 8/32-bit WISHBONE Data Bus. The Control and
+// : Read/Write Ports can be independently configured.
+// : 2. Support for "retry" on receipt of a WISHBONE RTY. This
+// : retry results in the current burst or classic cycle
+// : being issued again after a retry timeout.
+// : 3. Support for "error" on receipt of a WISHBONE ERR. This
+// : results in the current dma transfer being terminated
+// : and the error is updated within the STATUS CSR.
+// : 4. Support for burst size of 64.
+// :
+// Version : 3.3
+// : Support for MachXO2 added. The MachXO2 only has a FIFO
+// : with separate read/write clocks.
| philpem@0 | 1 | <?xml version="1.0" encoding="UTF-8"?> |
| philpem@1 | 2 | <Component Name="wb_dma_ctrl" Text="DMA" Type="IO" Ver="3.3" Help="wb_dma_ctrl\document\dma.htm" Processor="LM32,LM8" LatticeFamily="All" Device="All"> |
| philpem@0 | 3 | <MasterSlavePorts> |
| philpem@1 | 4 | <MasterPort Prefix="MA" Port="MA" Name="Read Master Port" Type="DMAR" Priority="2"/> |
| philpem@1 | 5 | <MasterPort Prefix="MB" Port="MB" Name="Write Master Port" Type="DMAW" Priority="3"/> |
| philpem@1 | 6 | <SlavePort Prefix="S" Port="S" Name="Control Port" Type="DATA"/> |
| philpem@0 | 7 | </MasterSlavePorts> |
| philpem@0 | 8 | <ClockPort Name="CLK_I " Description="Clock one"/> |
| philpem@0 | 9 | <ResetPort Name="RST_I " Description="Reset"/> |
| philpem@0 | 10 | <Interrupt Name="S_INT_O" Active="high" IRQ=""/> |
| philpem@0 | 11 | <Files> |
| philpem@0 | 12 | <File Name="../components/wb_dma_ctrl/rtl/verilog/master_ctrl.v" /> |
| philpem@0 | 13 | <File Name="../components/wb_dma_ctrl/rtl/verilog/slave_reg.v" /> |
| philpem@0 | 14 | <File Name="../components/wb_dma_ctrl/rtl/verilog/wb_dma_ctrl.v" /> |
| philpem@0 | 15 | </Files> |
| philpem@0 | 16 | <DeviceDriver InitRoutine="MicoDMAInit" StructName="MicoDMACtx_t"> |
| philpem@1 | 17 | <DDInclude Include="LookupServices.h" Processor="LM32"/> |
| philpem@1 | 18 | <DDInclude Include="stddef.h" Processor="LM8"/> |
| philpem@1 | 19 | <DDIRQ IRQAPI="MicoDMAISR" Parameter="InstanceName" Include="MicoDMA.h" Processor="LM8"/> |
| philpem@1 | 20 | <DDPreProcessor Name="__MICODMA_USER_IRQ_HANDLER__" Processor="LM8"/> |
| philpem@0 | 21 | <DDstruct> |
| philpem@1 | 22 | <DDSElem MemberName="name" MemberType="const char*" Type = "Parm" Value="InstanceName" Format="string" Processor="LM32,LM8"/> |
| philpem@1 | 23 | <DDSElem MemberName="base" MemberType="unsigned int" Type="Parm" Value="BASE_ADDRESS" Port="S" Processor="LM32"/> |
| philpem@1 | 24 | <DDSElem MemberName="base" MemberType="size_t" Type="Parm" Value="BASE_ADDRESS" Port="S" Processor="LM8"/> |
| philpem@1 | 25 | <DDSElem MemberName="wb" MemberType="unsigned char" Type="Parm" Value="WB_DAT_WIDTH" Port="S"/> |
| philpem@1 | 26 | <DDSElem MemberName="lookupReg" MemberType="DeviceReg_t" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@1 | 27 | <DDSElem MemberName="irq" MemberType="unsigned int" Type="Interrupt" Value="IRQ_LEVEL" Processor="LM32"/> |
| philpem@1 | 28 | <DDSElem MemberName="irq" MemberType="unsigned char" Type="Interrupt" Value="IRQ_LEVEL" Processor="LM8"/> |
| philpem@1 | 29 | <DDSElem MemberName="maxLength" MemberType="unsigned int" Type="Parm" Value="LENGTH_WIDTH" Processor="LM32"/> |
| philpem@1 | 30 | <DDSElem MemberName="flags" MemberType="unsigned int" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@1 | 31 | <DDSElem MemberName="pCurr" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@1 | 32 | <DDSElem MemberName="pHead" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@1 | 33 | <DDSElem MemberName="prev" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@1 | 34 | <DDSElem MemberName="next" MemberType="void *" Type="uninitialized" Value="" Processor="LM32"/> |
| philpem@0 | 35 | </DDstruct> |
| philpem@0 | 36 | </DeviceDriver> |
| philpem@0 | 37 | <PMIDef> |
| philpem@0 | 38 | <Module Name="pmi_fifo" /> |
| philpem@0 | 39 | <Module Name="pmi_fifo_dc" /> |
| philpem@0 | 40 | </PMIDef> |
| philpem@0 | 41 | <Parms> |
| philpem@1 | 42 | <Parm Name="InstanceName" Value="dma" Type="string" isiname="true" Text="Instance Name"/> |
| philpem@1 | 43 | <Parm Name="BASE_ADDRESS" Port="S" Value="0x80000000" Type="Integer" isba="true" Text="Base Address"/> |
| philpem@1 | 44 | <Parm Name="FIFO_IMPLEMENTATION" Value="EBR" Type="String" ListValues="EBR,LUT" Text="FIFO Implementation" isparm="true"/> |
| philpem@1 | 45 | <Parm Name="SIZE" Port="S" Value="128" Type="Integer" issize="true" Text="Size" Enable="false"/> |
| philpem@1 | 46 | <Parm Name="DISABLE" Value="undef" Type="define" isdisable="true" Text="Disable Component"/> |
| philpem@1 | 47 | <Parm Name="ADDRESS_LOCK" Value="undef" Type="Define" Text="Lock Address "/> |
| philpem@1 | 48 | <Parm Name="RETRY_TIMEOUT" Value="16" Type="Integer" ValueRange="1-255" Text="Retry Timeout" isparm="true"/> |
| philpem@1 | 49 | <Parm Name="LENGTH_WIDTH" Value="32" Type="Integer" ValueRange="1-32" Text="Length Width" isparm="false"/> |
| philpem@1 | 50 | <Parm Name="WB_DAT_WIDTH" Port="S" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="Control Port Data Bus Width" isparm="true"/> |
| philpem@1 | 51 | <Parm Name="WB_ADR_WIDTH" Port="S" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/> |
| philpem@1 | 52 | <Parm Name="WB_DAT_WIDTH" Port="MA" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="Read/Write Ports Data Bus Width" isparm="true" SetValTo="MB"/> |
| philpem@1 | 53 | <Parm Name="WB_ADR_WIDTH" Port="MA" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/> |
| philpem@1 | 54 | <Parm Name="WB_DAT_WIDTH" Port="MB" Value="32" Type="List" ListValues="8,32" OType="Integer" Text="WISHBONE Data Bus Width" isparm="true"/> |
| philpem@1 | 55 | <Parm Name="WB_ADR_WIDTH" Port="MB" Value="32" Type="Integer" OType="Integer" Text="WISHBONE Address Bus Width" isparm="true"/> |
| philpem@0 | 56 | </Parms> |
| philpem@0 | 57 | <GUIS Columns="2" Help="document\dma.htm" Name="WB_DMA_CTRL"> |
| philpem@0 | 58 | <GUI Widget="Text" Span="1" Name="InstanceName" Width="40"/> |
| philpem@1 | 59 | <GUI Widget="Text" Span="1" Name="BASE_ADDRESS" Port="S"/> |
| philpem@0 | 60 | <GUI Widget="Combo" Span="1" Name="FIFO_IMPLEMENTATION"/> |
| philpem@0 | 61 | <GUI Widget="Group" Span="2" Name="SETTINGS" Text="Settings" Columns="3"/> |
| philpem@0 | 62 | <GUI Widget="Label" Span="1" Name=""/> |
| philpem@1 | 63 | <GUI Widget="Spinner" Span="1" Name="RETRY_TIMEOUT"/> |
| philpem@1 | 64 | <GUI Widget="Group" Span="2" Text="WISHBONE Configuration" Columns="2"/> |
| philpem@1 | 65 | <GUI Widget="Combo" Span="1" Name="WB_DAT_WIDTH" Port="S"/> |
| philpem@1 | 66 | <GUI Widget="Combo" Span="1" Name="WB_DAT_WIDTH" Port="MA"/> |
| philpem@0 | 67 | </GUIS> |
| philpem@0 | 68 | </Component> |