Sat, 06 Aug 2011 01:43:24 +0100
Update to latest Lattice code dump (LM32 V3.8, GPIO V3.2)
Version : 3.2
Mod. Data : Jun 6, 2010
Changes Made : 1. Provide capability to read/write bytes (when GPIO larger than 8 bits wide)
2. Provide capability to use a 32-bit or 8-bit data bus on the WISHBONE slave port
3. Perform a big-endian to little-endian conversion in hardware
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| philpem@1 | 116 | <h1>LatticeMico GPIO <a title="View Data Sheet" href="gpio.pdf" target="_blank" onmouseover="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_showtip(this,event,'View Data Sheet');" onmouseout="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_hidetip();"><img src="ds_icon_ast.jpg" x-maintain-ratio="TRUE" width="29px" height="31px" border="0" class="img_whs1"></a></h1> |
| philpem@0 | 117 | |
| philpem@1 | 118 | <p>The LatticeMico general-purpose input/output core (GPIO) provides a |
| philpem@1 | 119 | memory-mapped interface between a WISHBONE slave port and general-purpose |
| philpem@0 | 120 | I/O ports. The I/O ports can connect to either on-chip or off-chip logic.</p> |
| philpem@0 | 121 | |
| philpem@0 | 122 | <p class="whs2">*If the data sheet fails to open, see the |
| philpem@0 | 123 | note at the bottom of this page.</p> |
| philpem@0 | 124 | |
| philpem@0 | 125 | <h2>Revision History</h2> |
| philpem@0 | 126 | |
| philpem@0 | 127 | |
| philpem@0 | 128 | |
| philpem@0 | 129 | <table x-use-null-cells cellspacing="0" width="637" height="84" class="whs3"> |
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| philpem@0 | 132 | //--></script> |
| philpem@0 | 133 | <col class="whs4"> |
| philpem@0 | 134 | <col class="whs5"> |
| philpem@0 | 135 | |
| philpem@0 | 136 | <tr valign="top" class="whs6"> |
| philpem@0 | 137 | <td bgcolor="#DEE8F4" width="85px" class="whs7"> |
| philpem@0 | 138 | <p class=Table |
| philpem@0 | 139 | style="font-weight: bold;">Version</td> |
| philpem@0 | 140 | <td bgcolor="#DEE8F4" width="505px" class="whs8"> |
| philpem@0 | 141 | <p class=Table |
| philpem@0 | 142 | style="font-weight: bold;">Description</td></tr> |
| philpem@0 | 143 | |
| philpem@0 | 144 | <tr valign="top" class="whs6"> |
| philpem@0 | 145 | <td colspan="1" rowspan="1" width="85px" class="whs9"> |
| philpem@0 | 146 | <p class=Table |
| philpem@1 | 147 | style="font-weight: normal;">3.3</td> |
| philpem@1 | 148 | <td colspan="1" rowspan="1" width="505px" class="whs10"> |
| philpem@1 | 149 | <p class=Table>Added software support for LatticeMico8. |
| philpem@1 | 150 | </td></tr> |
| philpem@1 | 151 | |
| philpem@1 | 152 | <tr valign="top" class="whs6"> |
| philpem@1 | 153 | <td colspan="1" rowspan="1" width="85px" class="whs9"> |
| philpem@1 | 154 | <p class=Table |
| philpem@1 | 155 | style="font-weight: normal;">3.2 (8.1 SP1)</td> |
| philpem@1 | 156 | <td colspan="1" rowspan="1" width="505px" class="whs10"> |
| philpem@1 | 157 | <p class=Table>WISHBONE data bus size is configurable to 8 or 32 bits. |
| philpem@1 | 158 | Register map is updated to accommodate 8/32-bit WISHBONE data bus. </td></tr> |
| philpem@1 | 159 | |
| philpem@1 | 160 | <tr valign="top" class="whs6"> |
| philpem@1 | 161 | <td colspan="1" rowspan="1" width="85px" class="whs9"> |
| philpem@1 | 162 | <p class=Table |
| philpem@0 | 163 | style="font-weight: normal;">3.1 (7.2)</td> |
| philpem@0 | 164 | <td colspan="1" rowspan="1" width="505px" class="whs10"> |
| philpem@0 | 165 | <p class=Table>Updated the Edge Capture Register clean method</p> |
| philpem@0 | 166 | <p class=Table>Made IRQ Mask register readable</td></tr> |
| philpem@0 | 167 | |
| philpem@0 | 168 | <tr valign="top" class="whs6"> |
| philpem@0 | 169 | <td colspan="1" rowspan="1" width="85px" class="whs9"> |
| philpem@0 | 170 | <p class=Table |
| philpem@0 | 171 | style="font-weight: normal;">3.0 (7.0 SP2)</td> |
| philpem@0 | 172 | <td colspan="1" rowspan="1" width="505px" class="whs10"> |
| philpem@0 | 173 | <p class=Table>Cleaned up code. No function change.</td></tr> |
| philpem@0 | 174 | |
| philpem@0 | 175 | <tr valign="top" class="whs6"> |
| philpem@0 | 176 | <td colspan="1" rowspan="1" width="85px" class="whs9"> |
| philpem@0 | 177 | <p class=Table |
| philpem@0 | 178 | style="font-weight: normal;">1.0</td> |
| philpem@0 | 179 | <td colspan="1" rowspan="1" width="505px" class="whs10"> |
| philpem@0 | 180 | <p class=Table>Initial release.</td></tr> |
| philpem@0 | 181 | <script language='JavaScript'><!-- |
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| philpem@0 | 183 | //--></script> |
| philpem@0 | 184 | </table> |
| philpem@0 | 185 | |
| philpem@0 | 186 | <h2>Dialog Box Parameters</h2> |
| philpem@0 | 187 | |
| philpem@0 | 188 | <table x-use-null-cells cellspacing="0" class="whs11"> |
| philpem@0 | 189 | <col class="whs4"> |
| philpem@0 | 190 | <col class="whs12"> |
| philpem@0 | 191 | |
| philpem@0 | 192 | <tr valign="top" class="whs13"> |
| philpem@0 | 193 | <td bgcolor="#DEE8F4" width="85px" class="whs14"> |
| philpem@0 | 194 | <p class=Table |
| philpem@0 | 195 | style="font-weight: bold;">Parameter</td> |
| philpem@0 | 196 | <td bgcolor="#DEE8F4" width="503px" class="whs15"> |
| philpem@0 | 197 | <p class=Table |
| philpem@0 | 198 | style="font-weight: bold;">Description</td></tr> |
| philpem@0 | 199 | |
| philpem@0 | 200 | <tr valign="top" class="whs13"> |
| philpem@0 | 201 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 202 | <p class=Table>Instance Name</td> |
| philpem@0 | 203 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 204 | <p class=Table>Specifies the name of the GPIO instance. Alphanumeric values |
| philpem@0 | 205 | and underscores are supported. The default is gpio.</td></tr> |
| philpem@0 | 206 | |
| philpem@0 | 207 | <tr valign="top" class="whs13"> |
| philpem@0 | 208 | <td width="85px" class="whs16"> |
| philpem@0 | 209 | <p class=Table>Base Address</td> |
| philpem@0 | 210 | <td width="503px" class="whs17"> |
| philpem@0 | 211 | <p class=Table>Specifies the base address for the device. The minimum boundary |
| philpem@0 | 212 | alignment is 0X80. Supported values are 0X80000000 to 0XFFFFFF80. The |
| philpem@0 | 213 | default is 0x80000000. If other components are included in the platform, |
| philpem@0 | 214 | the allowable values will vary.</td></tr> |
| philpem@0 | 215 | |
| philpem@0 | 216 | <tr valign="top" class="whs13"> |
| philpem@0 | 217 | <td colspan="2" rowspan="1" width="588px" class="whs18"> |
| philpem@0 | 218 | <p class=Table |
| philpem@0 | 219 | style="font-weight: bold;">Port Types</td> |
| philpem@0 | 220 | </tr> |
| philpem@0 | 221 | |
| philpem@0 | 222 | <tr valign="top" class="whs13"> |
| philpem@0 | 223 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 224 | <p class=Table>Output Ports Only</td> |
| philpem@0 | 225 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 226 | <p class=Table>Specifies the transfer mode of PIO ports as output only. |
| philpem@0 | 227 | This option is selected by default.</td></tr> |
| philpem@0 | 228 | |
| philpem@0 | 229 | <tr valign="top" class="whs13"> |
| philpem@0 | 230 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 231 | <p class=Table>Input Ports Only</td> |
| philpem@0 | 232 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 233 | <p class=Table>Specifies the transfer mode of PIO ports as input only. |
| philpem@0 | 234 | This option is deselected by default.</td></tr> |
| philpem@0 | 235 | |
| philpem@0 | 236 | <tr valign="top" class="whs13"> |
| philpem@0 | 237 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 238 | <p class=Table>Tristate Ports</td> |
| philpem@0 | 239 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 240 | <p class=Table>Specifies the transfer mode of PIO ports as tristate only. |
| philpem@0 | 241 | This option is deselected by default.</td></tr> |
| philpem@0 | 242 | |
| philpem@0 | 243 | <tr valign="top" class="whs13"> |
| philpem@0 | 244 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 245 | <p class=Table>Both Input and Output</td> |
| philpem@0 | 246 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 247 | <p class=Table>Specifies the transfer mode of PIO ports as both input and |
| philpem@0 | 248 | output. This option is deselected by default.</td></tr> |
| philpem@0 | 249 | |
| philpem@0 | 250 | <tr valign="top" class="whs13"> |
| philpem@0 | 251 | <td colspan="2" rowspan="1" width="588px" class="whs18"> |
| philpem@0 | 252 | <p class=Table |
| philpem@0 | 253 | style="font-weight: bold;">Port Width</td> |
| philpem@0 | 254 | </tr> |
| philpem@0 | 255 | |
| philpem@0 | 256 | <tr valign="top" class="whs13"> |
| philpem@0 | 257 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 258 | <p class=Table>Data Width</td> |
| philpem@0 | 259 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 260 | <p class=Table>Specifies the width of the I/O port, in bits. Supported |
| philpem@0 | 261 | values are 1 to 32. The default is 1.</td></tr> |
| philpem@0 | 262 | |
| philpem@0 | 263 | <tr valign="top" class="whs13"> |
| philpem@0 | 264 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 265 | <p class=Table>Input Width</td> |
| philpem@0 | 266 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 267 | <p class=Table>Specifies the input data bus width for an independent input/output |
| philpem@0 | 268 | GPIO, in bits. Supported values are 1 to 32. The default is 1.</td></tr> |
| philpem@0 | 269 | |
| philpem@0 | 270 | <tr valign="top" class="whs13"> |
| philpem@0 | 271 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 272 | <p class=Table>Output Width</td> |
| philpem@0 | 273 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 274 | <p class=Table>Specifies the output data bus width for an independent input/output |
| philpem@0 | 275 | GPIO, in bits. Supported values are 1 to 32. The default is 1.</td></tr> |
| philpem@0 | 276 | |
| philpem@0 | 277 | <tr valign="top" class="whs13"> |
| philpem@0 | 278 | <td colspan="2" rowspan="1" width="588px" class="whs21"> |
| philpem@0 | 279 | <p class=Table |
| philpem@0 | 280 | style="font-weight: bold;">IRQ Mode</td> |
| philpem@0 | 281 | </tr> |
| philpem@0 | 282 | |
| philpem@0 | 283 | <tr valign="top" class="whs13"> |
| philpem@0 | 284 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 285 | <p class=Table>IRQ Mode</td> |
| philpem@0 | 286 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 287 | <p class=Table>Provides IRQ signal output when a specified event occurs |
| philpem@0 | 288 | on input ports. This option is deselected by default.</td></tr> |
| philpem@0 | 289 | |
| philpem@0 | 290 | <tr valign="top" class="whs13"> |
| philpem@0 | 291 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 292 | <p class=Table>Level</td> |
| philpem@0 | 293 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 294 | <p class=Table>Generates an IRQ whenever a specific input is high and interrupts |
| philpem@0 | 295 | have been enabled for that input in the IRQ-MASK register. This option |
| philpem@0 | 296 | is deselected by default.</td></tr> |
| philpem@0 | 297 | |
| philpem@0 | 298 | <tr valign="top" class="whs13"> |
| philpem@0 | 299 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 300 | <p class=Table>Edge</td> |
| philpem@0 | 301 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 302 | <p class=Table>Generates an IRQ whenever a specific bit in the edge capture |
| philpem@0 | 303 | register is high and interrupts have been enabled for that bit in the |
| philpem@0 | 304 | IRQ-MASK register. This option is selected by default.</td></tr> |
| philpem@0 | 305 | |
| philpem@0 | 306 | <tr valign="top" class="whs13"> |
| philpem@0 | 307 | <td colspan="2" rowspan="1" width="588px" class="whs18"> |
| philpem@0 | 308 | <p class=Table |
| philpem@0 | 309 | style="font-weight: bold;">Edge Response</td> |
| philpem@0 | 310 | </tr> |
| philpem@0 | 311 | |
| philpem@0 | 312 | <tr valign="top" class="whs13"> |
| philpem@0 | 313 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 314 | <p class=Table>Either Edge</td> |
| philpem@0 | 315 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 316 | <p class=Table>Generates an IRQ on either low-to-high or high-to-low transitions. |
| philpem@0 | 317 | This option is deselected by default.</td></tr> |
| philpem@0 | 318 | |
| philpem@0 | 319 | <tr valign="top" class="whs13"> |
| philpem@0 | 320 | <td colspan="1" rowspan="1" width="85px" class="whs19"> |
| philpem@0 | 321 | <p class=Table>Positive Edge</td> |
| philpem@0 | 322 | <td colspan="1" rowspan="1" width="503px" class="whs20"> |
| philpem@0 | 323 | <p class=Table>Generates an IRQ on low-to-high transitions. This option |
| philpem@0 | 324 | is selected by default.</td></tr> |
| philpem@0 | 325 | |
| philpem@0 | 326 | <tr valign="top" class="whs13"> |
| philpem@0 | 327 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@0 | 328 | <p class=Table>Negative Edge</td> |
| philpem@0 | 329 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@0 | 330 | <p class=Table>Generates an IRQ on high-to-low transitions. This option |
| philpem@0 | 331 | is deselected by default.</td></tr> |
| philpem@1 | 332 | |
| philpem@1 | 333 | <tr valign="top" class="whs13"> |
| philpem@1 | 334 | <td colspan="2" rowspan="1" width="85px" class="whs16"> |
| philpem@1 | 335 | <p class=Table |
| philpem@1 | 336 | style="font-weight: bold;">WISHBONE Configuration</td> |
| philpem@1 | 337 | </tr> |
| philpem@1 | 338 | |
| philpem@1 | 339 | <tr valign="top" class="whs13"> |
| philpem@1 | 340 | <td colspan="1" rowspan="1" width="85px" class="whs16"> |
| philpem@1 | 341 | <p class=Table>WISHBONE Data Bus Width</td> |
| philpem@1 | 342 | <td colspan="1" rowspan="1" width="503px" class="whs17"> |
| philpem@1 | 343 | <p class=Table>Specifies the WISHBONE data bus width in bits. Supported |
| philpem@1 | 344 | values are 8 and 32. The default is 32.</td></tr> |
| philpem@0 | 345 | </table> |
| philpem@0 | 346 | |
| philpem@0 | 347 | |
| philpem@0 | 348 | |
| philpem@0 | 349 | <p><span style="font-weight: bold;"><B>Note</B></span>: If the data sheet fails |
| philpem@0 | 350 | to open, click <img src="qm_icon.jpg" x-maintain-ratio="TRUE" width="14px" height="16px" border="0" class="img_whs22"> on the Available Components toolbar, and |
| philpem@0 | 351 | then click the note button.</p> |
| philpem@0 | 352 | |
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