1.1 diff -r 267b5a25932f -r dfc32cad81ba document/gpio.htm 1.2 --- a/document/gpio.htm Fri Aug 13 10:41:29 2010 +0100 1.3 +++ b/document/gpio.htm Sat Aug 06 01:43:24 2011 +0100 1.4 @@ -113,10 +113,10 @@ 1.5 writeIntopicBar(4); 1.6 //--> 1.7 </script> 1.8 -<h1>LatticeMico32 GPIO <a title="View Data Sheet" href="gpio.pdf" target="_blank" onmouseover="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_showtip(this,event,'View Data Sheet');" onmouseout="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_hidetip();"><img src="ds_icon_ast.jpg" x-maintain-ratio="TRUE" width="29px" height="31px" border="0" class="img_whs1"></a></h1> 1.9 +<h1>LatticeMico GPIO <a title="View Data Sheet" href="gpio.pdf" target="_blank" onmouseover="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_showtip(this,event,'View Data Sheet');" onmouseout="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_hidetip();"><img src="ds_icon_ast.jpg" x-maintain-ratio="TRUE" width="29px" height="31px" border="0" class="img_whs1"></a></h1> 1.10 1.11 -<p>The LatticeMico32 general-purpose input/output core (GPIO) provides 1.12 - a memory-mapped interface between a WISHBONE slave port and general-purpose 1.13 +<p>The LatticeMico general-purpose input/output core (GPIO) provides a 1.14 + memory-mapped interface between a WISHBONE slave port and general-purpose 1.15 I/O ports. The I/O ports can connect to either on-chip or off-chip logic.</p> 1.16 1.17 <p class="whs2">*If the data sheet fails to open, see the 1.18 @@ -144,6 +144,22 @@ 1.19 <tr valign="top" class="whs6"> 1.20 <td colspan="1" rowspan="1" width="85px" class="whs9"> 1.21 <p class=Table 1.22 + style="font-weight: normal;">3.3</td> 1.23 +<td colspan="1" rowspan="1" width="505px" class="whs10"> 1.24 +<p class=Table>Added software support for LatticeMico8. 1.25 +</td></tr> 1.26 + 1.27 +<tr valign="top" class="whs6"> 1.28 +<td colspan="1" rowspan="1" width="85px" class="whs9"> 1.29 +<p class=Table 1.30 + style="font-weight: normal;">3.2 (8.1 SP1)</td> 1.31 +<td colspan="1" rowspan="1" width="505px" class="whs10"> 1.32 +<p class=Table>WISHBONE data bus size is configurable to 8 or 32 bits. 1.33 + Register map is updated to accommodate 8/32-bit WISHBONE data bus. </td></tr> 1.34 + 1.35 +<tr valign="top" class="whs6"> 1.36 +<td colspan="1" rowspan="1" width="85px" class="whs9"> 1.37 +<p class=Table 1.38 style="font-weight: normal;">3.1 (7.2)</td> 1.39 <td colspan="1" rowspan="1" width="505px" class="whs10"> 1.40 <p class=Table>Updated the Edge Capture Register clean method</p> 1.41 @@ -313,6 +329,19 @@ 1.42 <td colspan="1" rowspan="1" width="503px" class="whs17"> 1.43 <p class=Table>Generates an IRQ on high-to-low transitions. This option 1.44 is deselected by default.</td></tr> 1.45 + 1.46 +<tr valign="top" class="whs13"> 1.47 +<td colspan="2" rowspan="1" width="85px" class="whs16"> 1.48 +<p class=Table 1.49 + style="font-weight: bold;">WISHBONE Configuration</td> 1.50 +</tr> 1.51 + 1.52 +<tr valign="top" class="whs13"> 1.53 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 1.54 +<p class=Table>WISHBONE Data Bus Width</td> 1.55 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 1.56 +<p class=Table>Specifies the WISHBONE data bus width in bits. Supported 1.57 + values are 8 and 32. The default is 32.</td></tr> 1.58 </table> 1.59 1.60