Fri, 13 Aug 2010 10:41:29 +0100
Initial commit, GPIO v3.1
1.1 diff -r 000000000000 -r 267b5a25932f document/ds_icon.jpg 1.2 Binary file document/ds_icon.jpg has changed
2.1 diff -r 000000000000 -r 267b5a25932f document/ds_icon_ast.jpg 2.2 Binary file document/ds_icon_ast.jpg has changed
3.1 diff -r 000000000000 -r 267b5a25932f document/dsb_icon.jpg 3.2 Binary file document/dsb_icon.jpg has changed
4.1 diff -r 000000000000 -r 267b5a25932f document/gpio.htm 4.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 4.3 +++ b/document/gpio.htm Fri Aug 13 10:41:29 2010 +0100 4.4 @@ -0,0 +1,336 @@ 4.5 +<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN"> 4.6 + 4.7 +<html> 4.8 + 4.9 +<head> 4.10 +<title>GPIO Core</title> 4.11 +<meta http-equiv="content-type" content="text/html; charset=windows-1252"> 4.12 +<meta name="generator" content="RoboHelp by eHelp Corporation www.ehelp.com"> 4.13 +<link rel="stylesheet" href="lever40_ns.css"><script type="text/javascript" language="JavaScript" title="WebHelpSplitCss"> 4.14 +<!-- 4.15 +if (navigator.appName !="Netscape") 4.16 +{ document.write("<link rel='stylesheet' href='lever40.css'>");} 4.17 +//--> 4.18 +</script> 4.19 +<style type="text/css"> 4.20 +<!-- 4.21 +img_whs1 { border:none; width:29px; height:31px; float:none; border-style:none; } 4.22 +p.whs2 { font-style:italic; } 4.23 +table.whs3 { height:84px; margin-left:14px; left:0px; top:129px; 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width:14px; height:16px; float:none; border-style:none; } 4.43 +--> 4.44 +</style><script type="text/javascript" language="JavaScript"> 4.45 +<!-- 4.46 +function ehlp_showtip(current,e,text) 4.47 +{ 4.48 + if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) 4.49 + { 4.50 + document.tooltip.document.write("<layer bgColor='yellow' style='border:1px solid black;font-size:12px;'>"+ text + "</layer>"); 4.51 + document.tooltip.document.close(); 4.52 + document.tooltip.left=e.pageX+5; 4.53 + document.tooltip.top=e.pageY+5; 4.54 + document.tooltip.visibility="show"; 4.55 + } 4.56 +} 4.57 +function ehlp_hidetip() 4.58 +{ 4.59 + document.tooltip.visibility="hidden"; 4.60 +} 4.61 +//--> 4.62 +</script> 4.63 +<script type="text/javascript" language="JavaScript" title="WebHelpInlineScript"> 4.64 +<!-- 4.65 +function reDo() { 4.66 + if (innerWidth != origWidth || innerHeight != origHeight) 4.67 + location.reload(); 4.68 +} 4.69 +if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) { 4.70 + origWidth = innerWidth; 4.71 + origHeight = innerHeight; 4.72 + onresize = reDo; 4.73 +} 4.74 +onerror = null; 4.75 +//--> 4.76 +</script> 4.77 +<style type="text/css"> 4.78 +<!-- 4.79 +div.WebHelpPopupMenu { position:absolute; left:0px; top:0px; z-index:4; visibility:hidden; } 4.80 +p.WebHelpNavBar { text-align:right; } 4.81 +--> 4.82 +</style><script type="text/javascript" language="javascript1.2" src="whmsg.js"></script> 4.83 +<script type="text/javascript" language="javascript" src="whver.js"></script> 4.84 +<script type="text/javascript" language="javascript1.2" src="whproxy.js"></script> 4.85 +<script type="text/javascript" language="javascript1.2" src="whutils.js"></script> 4.86 +<script type="text/javascript" language="javascript1.2" src="whtopic.js"></script> 4.87 +<script type="text/javascript" language="javascript1.2"> 4.88 +<!-- 4.89 +if (window.gbWhTopic) 4.90 +{ 4.91 + if (window.setRelStartPage) 4.92 + { 4.93 + addTocInfo("GPIO"); 4.94 + 4.95 + } 4.96 + 4.97 + 4.98 + if (window.setRelStartPage) 4.99 + { 4.100 + setRelStartPage("msb_peripherals.htm"); 4.101 + 4.102 + autoSync(0); 4.103 + sendSyncInfo(); 4.104 + sendAveInfoOut(); 4.105 + } 4.106 + 4.107 +} 4.108 +else 4.109 + if (window.gbIE4) 4.110 + document.location.reload(); 4.111 +//--> 4.112 +</script> 4.113 +</head> 4.114 +<body><script type="text/javascript" language="javascript1.2"> 4.115 +<!-- 4.116 +if (window.writeIntopicBar) 4.117 + writeIntopicBar(4); 4.118 +//--> 4.119 +</script> 4.120 +<h1>LatticeMico32 GPIO <a title="View Data Sheet" href="gpio.pdf" target="_blank" onmouseover="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_showtip(this,event,'View Data Sheet');" onmouseout="if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) ehlp_hidetip();"><img src="ds_icon_ast.jpg" x-maintain-ratio="TRUE" width="29px" height="31px" border="0" class="img_whs1"></a></h1> 4.121 + 4.122 +<p>The LatticeMico32 general-purpose input/output core (GPIO) provides 4.123 + a memory-mapped interface between a WISHBONE slave port and general-purpose 4.124 + I/O ports. The I/O ports can connect to either on-chip or off-chip logic.</p> 4.125 + 4.126 +<p class="whs2">*If the data sheet fails to open, see the 4.127 + note at the bottom of this page.</p> 4.128 + 4.129 +<h2>Revision History</h2> 4.130 + 4.131 + 4.132 + 4.133 +<table x-use-null-cells cellspacing="0" width="637" height="84" class="whs3"> 4.134 +<script language='JavaScript'><!-- 4.135 +if ((navigator.appName == "Netscape") && (parseInt(navigator.appVersion) == 4)) document.write("</table><table x-use-null-cells cellspacing='0' width='637' height='84' border='1' bordercolor='silver' bordercolorlight='silver' bordercolordark='silver'>"); 4.136 +//--></script> 4.137 +<col class="whs4"> 4.138 +<col class="whs5"> 4.139 + 4.140 +<tr valign="top" class="whs6"> 4.141 +<td bgcolor="#DEE8F4" width="85px" class="whs7"> 4.142 +<p class=Table 4.143 + style="font-weight: bold;">Version</td> 4.144 +<td bgcolor="#DEE8F4" width="505px" class="whs8"> 4.145 +<p class=Table 4.146 + style="font-weight: bold;">Description</td></tr> 4.147 + 4.148 +<tr valign="top" class="whs6"> 4.149 +<td colspan="1" rowspan="1" width="85px" class="whs9"> 4.150 +<p class=Table 4.151 + style="font-weight: normal;">3.1 (7.2)</td> 4.152 +<td colspan="1" rowspan="1" width="505px" class="whs10"> 4.153 +<p class=Table>Updated the Edge Capture Register clean method</p> 4.154 +<p class=Table>Made IRQ Mask register readable</td></tr> 4.155 + 4.156 +<tr valign="top" class="whs6"> 4.157 +<td colspan="1" rowspan="1" width="85px" class="whs9"> 4.158 +<p class=Table 4.159 + style="font-weight: normal;">3.0 (7.0 SP2)</td> 4.160 +<td colspan="1" rowspan="1" width="505px" class="whs10"> 4.161 +<p class=Table>Cleaned up code. No function change.</td></tr> 4.162 + 4.163 +<tr valign="top" class="whs6"> 4.164 +<td colspan="1" rowspan="1" width="85px" class="whs9"> 4.165 +<p class=Table 4.166 + style="font-weight: normal;">1.0</td> 4.167 +<td colspan="1" rowspan="1" width="505px" class="whs10"> 4.168 +<p class=Table>Initial release.</td></tr> 4.169 +<script language='JavaScript'><!-- 4.170 +if ((navigator.appName == "Netscape") && (parseInt(navigator.appVersion) == 4)) document.write("</table></table><table>"); 4.171 +//--></script> 4.172 +</table> 4.173 + 4.174 +<h2>Dialog Box Parameters</h2> 4.175 + 4.176 +<table x-use-null-cells cellspacing="0" class="whs11"> 4.177 +<col class="whs4"> 4.178 +<col class="whs12"> 4.179 + 4.180 +<tr valign="top" class="whs13"> 4.181 +<td bgcolor="#DEE8F4" width="85px" class="whs14"> 4.182 +<p class=Table 4.183 + style="font-weight: bold;">Parameter</td> 4.184 +<td bgcolor="#DEE8F4" width="503px" class="whs15"> 4.185 +<p class=Table 4.186 + style="font-weight: bold;">Description</td></tr> 4.187 + 4.188 +<tr valign="top" class="whs13"> 4.189 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.190 +<p class=Table>Instance Name</td> 4.191 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.192 +<p class=Table>Specifies the name of the GPIO instance. Alphanumeric values 4.193 + and underscores are supported. The default is gpio.</td></tr> 4.194 + 4.195 +<tr valign="top" class="whs13"> 4.196 +<td width="85px" class="whs16"> 4.197 +<p class=Table>Base Address</td> 4.198 +<td width="503px" class="whs17"> 4.199 +<p class=Table>Specifies the base address for the device. The minimum boundary 4.200 + alignment is 0X80. Supported values are 0X80000000 to 0XFFFFFF80. The 4.201 + default is 0x80000000. If other components are included in the platform, 4.202 + the allowable values will vary.</td></tr> 4.203 + 4.204 +<tr valign="top" class="whs13"> 4.205 +<td colspan="2" rowspan="1" width="588px" class="whs18"> 4.206 +<p class=Table 4.207 + style="font-weight: bold;">Port Types</td> 4.208 +</tr> 4.209 + 4.210 +<tr valign="top" class="whs13"> 4.211 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.212 +<p class=Table>Output Ports Only</td> 4.213 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.214 +<p class=Table>Specifies the transfer mode of PIO ports as output only. 4.215 + This option is selected by default.</td></tr> 4.216 + 4.217 +<tr valign="top" class="whs13"> 4.218 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.219 +<p class=Table>Input Ports Only</td> 4.220 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.221 +<p class=Table>Specifies the transfer mode of PIO ports as input only. 4.222 + This option is deselected by default.</td></tr> 4.223 + 4.224 +<tr valign="top" class="whs13"> 4.225 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.226 +<p class=Table>Tristate Ports</td> 4.227 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.228 +<p class=Table>Specifies the transfer mode of PIO ports as tristate only. 4.229 + This option is deselected by default.</td></tr> 4.230 + 4.231 +<tr valign="top" class="whs13"> 4.232 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.233 +<p class=Table>Both Input and Output</td> 4.234 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.235 +<p class=Table>Specifies the transfer mode of PIO ports as both input and 4.236 + output. This option is deselected by default.</td></tr> 4.237 + 4.238 +<tr valign="top" class="whs13"> 4.239 +<td colspan="2" rowspan="1" width="588px" class="whs18"> 4.240 +<p class=Table 4.241 + style="font-weight: bold;">Port Width</td> 4.242 +</tr> 4.243 + 4.244 +<tr valign="top" class="whs13"> 4.245 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.246 +<p class=Table>Data Width</td> 4.247 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.248 +<p class=Table>Specifies the width of the I/O port, in bits. Supported 4.249 + values are 1 to 32. The default is 1.</td></tr> 4.250 + 4.251 +<tr valign="top" class="whs13"> 4.252 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.253 +<p class=Table>Input Width</td> 4.254 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.255 +<p class=Table>Specifies the input data bus width for an independent input/output 4.256 + GPIO, in bits. Supported values are 1 to 32. The default is 1.</td></tr> 4.257 + 4.258 +<tr valign="top" class="whs13"> 4.259 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.260 +<p class=Table>Output Width</td> 4.261 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.262 +<p class=Table>Specifies the output data bus width for an independent input/output 4.263 + GPIO, in bits. Supported values are 1 to 32. The default is 1.</td></tr> 4.264 + 4.265 +<tr valign="top" class="whs13"> 4.266 +<td colspan="2" rowspan="1" width="588px" class="whs21"> 4.267 +<p class=Table 4.268 + style="font-weight: bold;">IRQ Mode</td> 4.269 +</tr> 4.270 + 4.271 +<tr valign="top" class="whs13"> 4.272 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.273 +<p class=Table>IRQ Mode</td> 4.274 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.275 +<p class=Table>Provides IRQ signal output when a specified event occurs 4.276 + on input ports. This option is deselected by default.</td></tr> 4.277 + 4.278 +<tr valign="top" class="whs13"> 4.279 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.280 +<p class=Table>Level</td> 4.281 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.282 +<p class=Table>Generates an IRQ whenever a specific input is high and interrupts 4.283 + have been enabled for that input in the IRQ-MASK register. This option 4.284 + is deselected by default.</td></tr> 4.285 + 4.286 +<tr valign="top" class="whs13"> 4.287 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.288 +<p class=Table>Edge</td> 4.289 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.290 +<p class=Table>Generates an IRQ whenever a specific bit in the edge capture 4.291 + register is high and interrupts have been enabled for that bit in the 4.292 + IRQ-MASK register. This option is selected by default.</td></tr> 4.293 + 4.294 +<tr valign="top" class="whs13"> 4.295 +<td colspan="2" rowspan="1" width="588px" class="whs18"> 4.296 +<p class=Table 4.297 + style="font-weight: bold;">Edge Response</td> 4.298 +</tr> 4.299 + 4.300 +<tr valign="top" class="whs13"> 4.301 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.302 +<p class=Table>Either Edge</td> 4.303 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.304 +<p class=Table>Generates an IRQ on either low-to-high or high-to-low transitions. 4.305 + This option is deselected by default.</td></tr> 4.306 + 4.307 +<tr valign="top" class="whs13"> 4.308 +<td colspan="1" rowspan="1" width="85px" class="whs19"> 4.309 +<p class=Table>Positive Edge</td> 4.310 +<td colspan="1" rowspan="1" width="503px" class="whs20"> 4.311 +<p class=Table>Generates an IRQ on low-to-high transitions. This option 4.312 + is selected by default.</td></tr> 4.313 + 4.314 +<tr valign="top" class="whs13"> 4.315 +<td colspan="1" rowspan="1" width="85px" class="whs16"> 4.316 +<p class=Table>Negative Edge</td> 4.317 +<td colspan="1" rowspan="1" width="503px" class="whs17"> 4.318 +<p class=Table>Generates an IRQ on high-to-low transitions. This option 4.319 + is deselected by default.</td></tr> 4.320 +</table> 4.321 + 4.322 + 4.323 + 4.324 +<p><span style="font-weight: bold;"><B>Note</B></span>: If the data sheet fails 4.325 + to open, click <img src="qm_icon.jpg" x-maintain-ratio="TRUE" width="14px" height="16px" border="0" class="img_whs22"> on the Available Components toolbar, and 4.326 + then click the note button.</p> 4.327 + 4.328 +<script type="text/javascript" language="JavaScript"> 4.329 +<!-- 4.330 + if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == 'Netscape')) 4.331 + document.write("<div id='tooltip' class='WebHelpPopupMenu'></div>"); 4.332 +//--> 4.333 +</script><script type="text/javascript" language="javascript1.2"> 4.334 +<!-- 4.335 +if (window.writeIntopicBar) 4.336 + writeIntopicBar(0); 4.337 +//--> 4.338 +</script> 4.339 +</body> 4.340 +</html>
5.1 diff -r 000000000000 -r 267b5a25932f document/gpio.pdf 5.2 Binary file document/gpio.pdf has changed
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7.1 diff -r 000000000000 -r 267b5a25932f document/lever40_ns.css 7.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 7.3 +++ b/document/lever40_ns.css Fri Aug 13 10:41:29 2010 +0100 7.4 @@ -0,0 +1,248 @@ 7.5 +H1 { 7.6 + font-weight:bold; 7.7 + border-top-style:none; 7.8 + font-family:Arial, helvetica, sans-serif; 7.9 + color:#ea6d23; 7.10 + margin-left:15px; 7.11 + margin-top:3px; 7.12 + margin-bottom:10px; 7.13 + border-bottom-style:Solid; 7.14 + border-bottom-width:2px; 7.15 + border-bottom-color:#dbdbdb; 7.16 + margin-right:1pt; 7.17 + line-height:Normal; 7.18 + font-size:1em; } 7.19 +LI.kadov-H1 { 7.20 + font-weight:bold; 7.21 + font-family:Arial, helvetica, sans-serif; 7.22 + color:#ea6d23; 7.23 + line-height:Normal; 7.24 + font-size:1em; } 7.25 +H2 { 7.26 + font-weight:bold; 7.27 + x-text-underline:Off; 7.28 + border-top-style:none; 7.29 + border-bottom-style:none; 7.30 + font-family:Arial, helvetica, sans-serif; 7.31 + color:#ea6d23; 7.32 + margin-left:15px; 7.33 + margin-top:12px; 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}
8.1 diff -r 000000000000 -r 267b5a25932f document/qm_icon.jpg 8.2 Binary file document/qm_icon.jpg has changed
9.1 diff -r 000000000000 -r 267b5a25932f drivers/device/LCD.c 9.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 9.3 +++ b/drivers/device/LCD.c Fri Aug 13 10:41:29 2010 +0100 9.4 @@ -0,0 +1,241 @@ 9.5 +/**************************************************************************** 9.6 +** 9.7 +** Name: LCD.c 9.8 +** 9.9 +** Description: 9.10 +** Implements functions for manipulating a 9.11 +** dot-matrix LCD 9.12 +** 9.13 +** $Revision: $ 9.14 +** 9.15 +** Disclaimer: 9.16 +** 9.17 +** This source code is intended as a design reference which 9.18 +** illustrates how these types of functions can be implemented. It 9.19 +** is the user's responsibility to verify their design for 9.20 +** consistency and functionality through the use of formal 9.21 +** verification methods. Lattice Semiconductor provides no warranty 9.22 +** regarding the use or functionality of this code. 9.23 +** 9.24 +** -------------------------------------------------------------------- 9.25 +** 9.26 +** Lattice Semiconductor Corporation 9.27 +** 5555 NE Moore Court 9.28 +** Hillsboro, OR 97214 9.29 +** U.S.A 9.30 +** 9.31 +** TEL: 1-800-Lattice (USA and Canada) 9.32 +** (503)268-8001 (other locations) 9.33 +** 9.34 +** web: http://www.latticesemi.com 9.35 +** email: techsupport@latticesemi.com 9.36 +** 9.37 +** -------------------------------------------------------------------------- 9.38 +** 9.39 +** Change History (Latest changes on top) 9.40 +** 9.41 +** Ver Date Description 9.42 +** -------------------------------------------------------------------------- 9.43 +** 9.44 +** 3.0 Mar-25-2008 Added Header 9.45 +** 9.46 +**--------------------------------------------------------------------------- 9.47 +*****************************************************************************/ 9.48 + 9.49 +#include "LCD.h" 9.50 +#include "MicoUtils.h" 9.51 + 9.52 +void LCD_WriteData(volatile unsigned int *pAddress, unsigned int data) 9.53 +{ 9.54 + unsigned int iData = data; 9.55 + 9.56 + /* first output the data to write */ 9.57 + *pAddress = iData; 9.58 + 9.59 + /* strobe enable while maintaining data */ 9.60 + iData |= 0x400; 9.61 + *pAddress = iData; 9.62 + 9.63 + /* remove strobe while maintaining data */ 9.64 + iData &= ~0x400; 9.65 + *pAddress = iData; 9.66 + 9.67 + /* all done */ 9.68 + return; 9.69 +} 9.70 + 9.71 + 9.72 +void LCD_DisplayOnOff(MicoGPIOCtx_t *ctx, unsigned int bOn) 9.73 +{ 9.74 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.75 + unsigned int value; 9.76 + 9.77 + if(bOn == 0) /* turn display off */ 9.78 + value = 0x8; 9.79 + else /* turn display on */ 9.80 + value = 0xc; 9.81 + 9.82 + LCD_WriteData(pAddress, value); 9.83 + MicoSleepMilliSecs(10); 9.84 +} 9.85 + 9.86 + 9.87 +void LCD_CursorOnOff(MicoGPIOCtx_t *ctx, unsigned int bOn) 9.88 +{ 9.89 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.90 + /* cursor on-off control is valid only if the display is turned on */ 9.91 + unsigned int iValue; 9.92 + 9.93 + if(bOn == 0) 9.94 + iValue = 0x0c; 9.95 + else 9.96 + iValue = 0x0e; 9.97 + 9.98 + LCD_WriteData(pAddress, iValue); 9.99 + MicoSleepMilliSecs(10); 9.100 + 9.101 +} 9.102 + 9.103 + 9.104 +void LCD_BlinkOnOff(MicoGPIOCtx_t *ctx, unsigned int bOn) 9.105 +{ 9.106 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.107 + /* character-blink on/off is valid only if the display is turned on */ 9.108 + unsigned int iValue; 9.109 + 9.110 + if(bOn == 0) 9.111 + iValue = 0xc; 9.112 + else 9.113 + iValue = 0xd; 9.114 + 9.115 + LCD_WriteData(pAddress, iValue); 9.116 + MicoSleepMilliSecs(10); 9.117 +} 9.118 + 9.119 + 9.120 +/* clears LCD display */ 9.121 +void LCD_ClearDisplay(MicoGPIOCtx_t *ctx) 9.122 +{ 9.123 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.124 + LCD_WriteData(pAddress, 0x1); 9.125 + MicoSleepMilliSecs(10); 9.126 +} 9.127 + 9.128 + 9.129 +/* sets LCD function (#lines for the display, with 8-bit interface */ 9.130 +void LCD_SetFunction(MicoGPIOCtx_t *ctx, unsigned int iNumLines) 9.131 +{ 9.132 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.133 + unsigned int value; 9.134 + 9.135 + /* always sets an 8-bit interface */ 9.136 + if(iNumLines == 2) 9.137 + value = 0x38; 9.138 + else 9.139 + value = 0x00; 9.140 + 9.141 + LCD_WriteData(pAddress, value); 9.142 + MicoSleepMilliSecs(10); 9.143 +} 9.144 + 9.145 +/* sets cursor-move mode */ 9.146 +void LCD_SetCursorMoveMode(MicoGPIOCtx_t *ctx, unsigned int bIncrement) 9.147 +{ 9.148 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.149 + unsigned int value; 9.150 + if(bIncrement != 0) 9.151 + value = 0x6; 9.152 + else 9.153 + value = 0x4; 9.154 + LCD_WriteData(pAddress, value); 9.155 + MicoSleepMilliSecs(10); 9.156 +} 9.157 + 9.158 + 9.159 +/* shifts display to left (!= 0) or right (== 0) */ 9.160 +void LCD_ShiftDisplay(MicoGPIOCtx_t *ctx, unsigned int bLeft) 9.161 +{ 9.162 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.163 + unsigned int value; 9.164 + if(bLeft == 0) /* shift to right */ 9.165 + value = 0x18; 9.166 + else /* shift to left */ 9.167 + value = 0x1c; 9.168 + LCD_WriteData(pAddress, value); 9.169 + MicoSleepMilliSecs(10); 9.170 +} 9.171 + 9.172 + 9.173 +/* shifts cursor to left (!= 0) or right (== 0) */ 9.174 +void LCD_ShiftCursor(MicoGPIOCtx_t *ctx, unsigned int bLeft) 9.175 +{ 9.176 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.177 + unsigned int value; 9.178 + if(bLeft == 0) /* shift to right */ 9.179 + value = 0x10; 9.180 + else /* shift to left */ 9.181 + value = 0x14; 9.182 + LCD_WriteData(pAddress, value); 9.183 + MicoSleepMilliSecs(10); 9.184 +} 9.185 + 9.186 + 9.187 +void LCD_WriteChar(MicoGPIOCtx_t *ctx, unsigned char character) 9.188 +{ 9.189 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.190 + unsigned int value = (unsigned int)character; 9.191 + value |= 0x200; 9.192 + LCD_WriteData(pAddress, value); 9.193 + MicoSleepMilliSecs(10); 9.194 +} 9.195 + 9.196 + 9.197 +void LCD_SetCursorPos(MicoGPIOCtx_t *ctx, unsigned int iLine, unsigned int iCol) 9.198 +{ 9.199 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.200 + unsigned int value; 9.201 + if(iLine == 0) /* first line */ 9.202 + value = 0x80; 9.203 + else /* second line */ 9.204 + value = 0xc0; 9.205 + 9.206 + value += iCol; 9.207 + 9.208 + LCD_WriteData(pAddress, value); 9.209 + MicoSleepMilliSecs(10); 9.210 +} 9.211 + 9.212 + 9.213 +void LCD_Init(MicoGPIOCtx_t *ctx, unsigned int iLines) 9.214 +{ 9.215 + volatile unsigned int *pAddress = (volatile unsigned int *)(ctx->base); 9.216 + /* - wait for power-stabilization */ 9.217 + MicoSleepMilliSecs(40); 9.218 + 9.219 + *pAddress = 0x0; 9.220 + 9.221 + /* - set data-width (8 bits) and lines in display (2) */ 9.222 + LCD_SetFunction(ctx, iLines); 9.223 + LCD_SetFunction(ctx, iLines); 9.224 + LCD_SetFunction(ctx, iLines); 9.225 + 9.226 + 9.227 + /* turn off the display */ 9.228 + LCD_DisplayOnOff(ctx, 0); 9.229 + 9.230 + /* - clear display */ 9.231 + LCD_ClearDisplay(ctx); 9.232 + 9.233 + /* turn-on the display */ 9.234 + LCD_DisplayOnOff(ctx, 1); 9.235 + 9.236 + /* turn on the blinking of the cursor-position */ 9.237 + LCD_BlinkOnOff(ctx, 0); 9.238 + 9.239 + /* set cursor move-mode to increment */ 9.240 + LCD_SetCursorMoveMode(ctx, 1); 9.241 + 9.242 + /* all done */ 9.243 + return; 9.244 +} 9.245 +
10.1 diff -r 000000000000 -r 267b5a25932f drivers/device/LCD.h 10.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 10.3 +++ b/drivers/device/LCD.h Fri Aug 13 10:41:29 2010 +0100 10.4 @@ -0,0 +1,113 @@ 10.5 +/**************************************************************************** 10.6 +** 10.7 +** Name: LCD.h 10.8 +** 10.9 +** Description: 10.10 +** Declares user-callable functions for manipulating 10.11 +** dot-matrix LCD displays 10.12 +** 10.13 +** $Revision: $ 10.14 +** 10.15 +** Disclaimer: 10.16 +** 10.17 +** This source code is intended as a design reference which 10.18 +** illustrates how these types of functions can be implemented. It 10.19 +** is the user's responsibility to verify their design for 10.20 +** consistency and functionality through the use of formal 10.21 +** verification methods. Lattice Semiconductor provides no warranty 10.22 +** regarding the use or functionality of this code. 10.23 +** 10.24 +** -------------------------------------------------------------------- 10.25 +** 10.26 +** Lattice Semiconductor Corporation 10.27 +** 5555 NE Moore Court 10.28 +** Hillsboro, OR 97214 10.29 +** U.S.A 10.30 +** 10.31 +** TEL: 1-800-Lattice (USA and Canada) 10.32 +** (503)268-8001 (other locations) 10.33 +** 10.34 +** web: http://www.latticesemi.com 10.35 +** email: techsupport@latticesemi.com 10.36 +** 10.37 +** -------------------------------------------------------------------------- 10.38 +** 10.39 +** Change History (Latest changes on top) 10.40 +** 10.41 +** Ver Date Description 10.42 +** -------------------------------------------------------------------------- 10.43 +** 10.44 +** 3.0 Mar-25-2008 Added Header 10.45 +** 10.46 +**--------------------------------------------------------------------------- 10.47 +*****************************************************************************/ 10.48 + 10.49 +#ifndef LCD_H_ 10.50 +#define LCD_H_ 10.51 + 10.52 +#include "DDStructs.h" 10.53 + 10.54 +#ifdef __cplusplus 10.55 +extern "C" { 10.56 +#endif /* __cplusplus */ 10.57 + 10.58 + 10.59 +/* for direct read/write to the LCD */ 10.60 +void LCD_WriteData(volatile unsigned int * pAddress, unsigned int data); 10.61 + 10.62 + 10.63 +/* turns display on/off */ 10.64 +void LCD_DisplayOnOff(MicoGPIOCtx_t *pLCD, unsigned int bOn); 10.65 + 10.66 + 10.67 +/* turns cursor on/off */ 10.68 +void LCD_CursorOnOff(MicoGPIOCtx_t *pLCD, unsigned int bOn); 10.69 + 10.70 + 10.71 +/* turns blinking on/off */ 10.72 +void LCD_BlinkOnOff(MicoGPIOCtx_t *pLCD, unsigned int bOn); 10.73 + 10.74 + 10.75 +/* clears display */ 10.76 +void LCD_ClearDisplay(MicoGPIOCtx_t *pLCD); 10.77 + 10.78 + 10.79 +/* sets function */ 10.80 +void LCD_SetFunction(MicoGPIOCtx_t *pLCD, unsigned int iNumLines); 10.81 + 10.82 + 10.83 +/* sets cursor move mode */ 10.84 +void LCD_SetCursorMoveMode(MicoGPIOCtx_t *pLCD, unsigned int bIncrement); 10.85 + 10.86 + 10.87 +/* shifts display left or right by 1 */ 10.88 +void LCD_ShiftDisplay(MicoGPIOCtx_t *pLCD, unsigned int bLeft); 10.89 + 10.90 + 10.91 +/* shifts cursor left or right by 1 */ 10.92 +void LCD_ShiftCursor(MicoGPIOCtx_t *pLCD, unsigned int bLeft); 10.93 + 10.94 + 10.95 +/* writes a character to the display */ 10.96 +void LCD_WriteChar(MicoGPIOCtx_t *pLCD, unsigned char character); 10.97 + 10.98 + 10.99 +/* sets write-position (i.e. cursor position) */ 10.100 +void LCD_SetCursorPos(MicoGPIOCtx_t *pLCD, unsigned int iLine, unsigned int iCol); 10.101 + 10.102 + 10.103 +/* Initializes the LCD */ 10.104 +void LCD_Init(MicoGPIOCtx_t *pLCD, unsigned int iLines); 10.105 + 10.106 + 10.107 +/* writes a line to the LCD at the cursor position */ 10.108 +void LCD_WriteLine(MicoGPIOCtx_t *pLCD, const char *pLine); 10.109 + 10.110 + 10.111 +#ifdef __cplusplus 10.112 +} 10.113 +#endif /* __cplusplus */ 10.114 + 10.115 + 10.116 +#endif /*LCD_H_*/ 10.117 +
11.1 diff -r 000000000000 -r 267b5a25932f drivers/device/MicoGPIO.c 11.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 11.3 +++ b/drivers/device/MicoGPIO.c Fri Aug 13 10:41:29 2010 +0100 11.4 @@ -0,0 +1,67 @@ 11.5 +/**************************************************************************** 11.6 +** 11.7 +** Name: MicoGPIO.c 11.8 +** 11.9 +** Description: 11.10 +** Implements GPIO functions: 11.11 +** 11.12 +** MicoGPIOInit : GPIO initialization funciton called by LatticeDDInit 11.13 +** (user-callable) 11.14 +** 11.15 +** 11.16 +** $Revision: $ 11.17 +** 11.18 +** Disclaimer: 11.19 +** 11.20 +** This source code is intended as a design reference which 11.21 +** illustrates how these types of functions can be implemented. It 11.22 +** is the user's responsibility to verify their design for 11.23 +** consistency and functionality through the use of formal 11.24 +** verification methods. Lattice Semiconductor provides no warranty 11.25 +** regarding the use or functionality of this code. 11.26 +** 11.27 +** -------------------------------------------------------------------- 11.28 +** 11.29 +** Lattice Semiconductor Corporation 11.30 +** 5555 NE Moore Court 11.31 +** Hillsboro, OR 97214 11.32 +** U.S.A 11.33 +** 11.34 +** TEL: 1-800-Lattice (USA and Canada) 11.35 +** (503)268-8001 (other locations) 11.36 +** 11.37 +** web: http://www.latticesemi.com 11.38 +** email: techsupport@latticesemi.com 11.39 +** 11.40 +** -------------------------------------------------------------------------- 11.41 +** 11.42 +** Change History (Latest changes on top) 11.43 +** 11.44 +** Ver Date Description 11.45 +** -------------------------------------------------------------------------- 11.46 +** 11.47 +** 3.0 Mar-25-2008 Added Header 11.48 +** 11.49 +**--------------------------------------------------------------------------- 11.50 +*****************************************************************************/ 11.51 + 11.52 +#include "MicoGPIO.h" 11.53 +#include "MicoGPIOService.h" 11.54 +#include "MicoMacros.h" 11.55 +#include "LookupServices.h" 11.56 + 11.57 + 11.58 +/****************************************************************************** 11.59 + * Initializes a gpio * 11.60 + ******************************************************************************/ 11.61 +void MicoGPIOInit( MicoGPIOCtx_t *ctx ) 11.62 +{ 11.63 + ctx->lookupReg.name = ctx->name; 11.64 + ctx->lookupReg.deviceType = "GPIODevice"; 11.65 + ctx->lookupReg.priv = ctx; 11.66 + 11.67 + MicoRegisterDevice( &(ctx->lookupReg) ); 11.68 + /* all done */ 11.69 + return; 11.70 +} 11.71 +
12.1 diff -r 000000000000 -r 267b5a25932f drivers/device/MicoGPIO.h 12.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 12.3 +++ b/drivers/device/MicoGPIO.h Fri Aug 13 10:41:29 2010 +0100 12.4 @@ -0,0 +1,161 @@ 12.5 +/**************************************************************************** 12.6 +** 12.7 +** Name: MicoGPIO.h 12.8 +** 12.9 +** Description: 12.10 +** Declares GPIO register structure and 12.11 +** macros/functions for manipulating GPIO 12.12 +** 12.13 +** $Revision: $ 12.14 +** 12.15 +** Disclaimer: 12.16 +** 12.17 +** This source code is intended as a design reference which 12.18 +** illustrates how these types of functions can be implemented. It 12.19 +** is the user's responsibility to verify their design for 12.20 +** consistency and functionality through the use of formal 12.21 +** verification methods. Lattice Semiconductor provides no warranty 12.22 +** regarding the use or functionality of this code. 12.23 +** 12.24 +** -------------------------------------------------------------------- 12.25 +** 12.26 +** Lattice Semiconductor Corporation 12.27 +** 5555 NE Moore Court 12.28 +** Hillsboro, OR 97214 12.29 +** U.S.A 12.30 +** 12.31 +** TEL: 1-800-Lattice (USA and Canada) 12.32 +** (503)268-8001 (other locations) 12.33 +** 12.34 +** web: http://www.latticesemi.com 12.35 +** email: techsupport@latticesemi.com 12.36 +** 12.37 +** -------------------------------------------------------------------------- 12.38 +** 12.39 +** Change History (Latest changes on top) 12.40 +** 12.41 +** Ver Date Description 12.42 +** -------------------------------------------------------------------------- 12.43 +** 12.44 +** 3.1 Oct-23-2008 Updated macros to provide for 12.45 +** reading of the interrupt-mask register 12.46 +** and writing to the edge-capture register 12.47 +** Updated comments in the GPIO register 12.48 +** structure definition 12.49 +** 3.0 Mar-25-2008 Added Header 12.50 +** 12.51 +** 12.52 +**--------------------------------------------------------------------------- 12.53 +*****************************************************************************/ 12.54 + 12.55 +#ifndef MICO32_MICOGPIO_HEADER_FILE 12.56 +#define MICO32_MICOGPIO_HEADER_FILE 12.57 + 12.58 +#include "MicoTypes.h" 12.59 +#include "DDStructs.h" 12.60 + 12.61 +/**************************************************************************** 12.62 + * Mico-GPIO driver does not provide any specific user-routine other than * 12.63 + * linking it to GPIO services for lookup capability. * 12.64 + *--------------------------------------------------------------------------* 12.65 + * Mico GPIOs must be located in a non-cached region to use this driver * 12.66 + ****************************************************************************/ 12.67 + 12.68 + 12.69 +#ifdef __cplusplus 12.70 +extern "C" 12.71 +{ 12.72 +#endif /* __cplusplus */ 12.73 + 12.74 + /* 12.75 + ***************************************** 12.76 + ***************************************** 12.77 + GPIO REGISTER MAPPING 12.78 + ***************************************** 12.79 + ***************************************** 12.80 + */ 12.81 + typedef struct st_MicoGPIO_t{ 12.82 + volatile unsigned int data; /* R/W: 12.83 + R for in-only GPIO, 12.84 + W for out-only GPIO, 12.85 + R/W for tristates */ 12.86 + volatile unsigned int tristate; /* R/W: 12.87 + tristate enable reg for 12.88 + tristate GPIOs */ 12.89 + volatile unsigned int irqMask; /* R/W: 12.90 + irq mask for interrupt- 12.91 + enabled GPIOs */ 12.92 + volatile unsigned int edgeCapture; /* R/W: 12.93 + applicable to GPIOs with 12.94 + edge-capture ability */ 12.95 + }MicoGPIO_t; 12.96 + 12.97 + 12.98 + 12.99 + /* 12.100 + ******************************************** 12.101 + ******************************************** 12.102 + MACROS FOR ACCESSING GPIO REGISTERS 12.103 + ******************************************** 12.104 + NOTE: FOR THE MACROS, THE FOLLOWING RULES 12.105 + APPLY: 12.106 + X is pointer to a valid MicoGPIOCtx_t structure 12.107 + Y is unsigned int variable 12.108 + */ 12.109 + 12.110 + 12.111 + /* reads data register */ 12.112 + #define MICO_GPIO_READ_DATA(X,Y) \ 12.113 + (Y)=((volatile MicoGPIO_t *)((X)->base))->data 12.114 + 12.115 + 12.116 + /* writes data-register */ 12.117 + #define MICO_GPIO_WRITE_DATA(X,Y) \ 12.118 + ((volatile MicoGPIO_t *)((X)->base))->data=(Y) 12.119 + 12.120 + 12.121 + /* reads tristate register */ 12.122 + #define MICO_GPIO_READ_TRISTATE(X,Y) \ 12.123 + (Y) = ((volatile MicoGPIO_t *)((X)->base))->tristate 12.124 + 12.125 + 12.126 + /* writes tristate register */ 12.127 + #define MICO_GPIO_WRITE_TRISTATE(X,Y) \ 12.128 + ((volatile MicoGPIO_t *)((X)->base))->tristate = (Y) 12.129 + 12.130 + 12.131 + /* reads irq-mask register */ 12.132 + #define MICO_GPIO_READ_IRQ_MASK(X,Y) \ 12.133 + (Y) = ((volatile MicoGPIO_t *)((X)->base))->irqMask 12.134 + 12.135 + 12.136 + /* writes irq-mask register */ 12.137 + #define MICO_GPIO_WRITE_IRQ_MASK(X,Y) \ 12.138 + ((volatile MicoGPIO_t *)((X)->base))->irqMask = (Y) 12.139 + 12.140 + 12.141 + /* reads edge-capture register */ 12.142 + #define MICO_GPIO_READ_EDGE_CAPTURE(X,Y) \ 12.143 + (Y) = ((volatile MicoGPIO_t *)((X)->base))->edgeCapture 12.144 + 12.145 + 12.146 + /* writes edge-capture register */ 12.147 + #define MICO_GPIO_WRITE_EDGE_CAPTURE(X,Y) \ 12.148 + ((volatile MicoGPIO_t *)((X)->base))->edgeCapture = (Y) 12.149 + 12.150 + 12.151 +/****************************************************************************** 12.152 + * functions * 12.153 + ******************************************************************************/ 12.154 + 12.155 +/* initializes Mico32 GPIO peripheral */ 12.156 +void MicoGPIOInit( MicoGPIOCtx_t *ctx ); 12.157 + 12.158 + 12.159 +#ifdef __cplusplus 12.160 +}; 12.161 +#endif /* __cplusplus */ 12.162 + 12.163 + 12.164 +#endif /*MICO32_MICOGPIO_HEADER_FILE */ 12.165 +
13.1 diff -r 000000000000 -r 267b5a25932f drivers/peripheral.mk 13.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 13.3 +++ b/drivers/peripheral.mk Fri Aug 13 10:41:29 2010 +0100 13.4 @@ -0,0 +1,10 @@ 13.5 +#--------------------------------------------------------- 13.6 +# Identify source-paths for this device's driver-sources, 13.7 +# compiled when building the library 13.8 +#--------------------------------------------------------- 13.9 +LIBRARY_C_SRCS += MicoGPIO.c \ 13.10 + MicoGPIOService.c \ 13.11 + LCD.c 13.12 + 13.13 +LIBRARY_ASM_SRCS += 13.14 +
14.1 diff -r 000000000000 -r 267b5a25932f drivers/service/MicoGPIOService.c 14.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 14.3 +++ b/drivers/service/MicoGPIOService.c Fri Aug 13 10:41:29 2010 +0100 14.4 @@ -0,0 +1,2 @@ 14.5 +/* NO IMPLEMENTATION, BY DESIGN */ 14.6 +
15.1 diff -r 000000000000 -r 267b5a25932f drivers/service/MicoGPIOService.h 15.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 15.3 +++ b/drivers/service/MicoGPIOService.h Fri Aug 13 10:41:29 2010 +0100 15.4 @@ -0,0 +1,17 @@ 15.5 +#ifndef MICO32_GPIOSERVICE_HEADER_FILE 15.6 +#define MICO32_GPIOSERVICE_HEADER_FILE 15.7 + 15.8 + 15.9 +#ifdef __cplusplus 15.10 +extern "C" 15.11 +{ 15.12 +#endif /* __cplusplus */ 15.13 + 15.14 + 15.15 + 15.16 +#ifdef __cplusplus 15.17 +}; 15.18 +#endif /* __cplusplus */ 15.19 + 15.20 + 15.21 +#endif /* MICO32_GPIOSERVICE_HEADER_FILE */
16.1 diff -r 000000000000 -r 267b5a25932f gpio.xml 16.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 16.3 +++ b/gpio.xml Fri Aug 13 10:41:29 2010 +0100 16.4 @@ -0,0 +1,83 @@ 16.5 +<?xml version="1.0" encoding="UTF-8"?> 16.6 +<Component Name="gpio" Text="GPIO" Type="IO" Ver="3.1" Help="gpio\document\gpio.htm"> 16.7 + <MasterSlavePorts> 16.8 + <SlavePort Prefix="GPIO" Name="GP I/O Port" Type="DATA,DMAR,DMAW"/> 16.9 + </MasterSlavePorts> 16.10 + <ClockPort Name="CLK_I" Description="Clock one"/> 16.11 + <ResetPort Name="RST_I" Description="Reset"/> 16.12 + <Interrupt Name="IRQ_O" Active="high" IRQ=""/> 16.13 + <ExternalPorts> 16.14 + <ExternalPort Name="PIO_IN" Type="input" Width="DATA_WIDTH" Condition="INPUT_PORTS_ONLY" /> 16.15 + <ExternalPort Name="PIO_BOTH_IN" Type="input" Width="INPUT_WIDTH" Condition="BOTH_INPUT_AND_OUTPUT" /> 16.16 + <ExternalPort Name="PIO_OUT" Type="output" Width="DATA_WIDTH" Condition="OUTPUT_PORTS_ONLY" /> 16.17 + <ExternalPort Name="PIO_BOTH_OUT" Type="output" Width="OUTPUT_WIDTH" Condition="BOTH_INPUT_AND_OUTPUT" /> 16.18 + <ExternalPort Name="PIO_IO" Type="inout" Width="DATA_WIDTH" Condition="TRISTATE_PORTS" /> 16.19 + </ExternalPorts> 16.20 + <DeviceDriver InitRoutine="MicoGPIOInit" StructName="MicoGPIOCtx_t"> 16.21 + <DDInclude Include = "LookupServices.h"/> 16.22 + <DDstruct> 16.23 + <DDSElem MemberName = "name" MemberType = "const char*" Type = "Parm" Value = "InstanceName" Format="string"/> 16.24 + <DDSElem MemberName = "base" MemberType = "unsigned int" Type = "Parm" Value = "BASE_ADDRESS" /> 16.25 + <DDSElem MemberName = "lookupReg" MemberType = "DeviceReg_t" Type="uninitialized" Value=""/> 16.26 + <DDSElem MemberName = "intrLevel" MemberType = "unsigned int" Type = "Interrupt" Value = "IRQ_LEVEL" /> 16.27 + <DDSElem MemberName = "output_only" MemberType = "unsigned int" Type = "Parm" Value = "OUTPUT_PORTS_ONLY" /> 16.28 + <DDSElem MemberName = "input_only" MemberType = "unsigned int" Type = "Parm" Value = "INPUT_PORTS_ONLY" /> 16.29 + <DDSElem MemberName = "in_and_out" MemberType = "unsigned int" Type = "Parm" Value = "BOTH_INPUT_AND_OUTPUT" /> 16.30 + <DDSElem MemberName = "tristate" MemberType = "unsigned int" Type = "Parm" Value = "TRISTATE_PORTS" /> 16.31 + <DDSElem MemberName = "data_width" MemberType = "unsigned int" Type = "Parm" Value = "DATA_WIDTH" /> 16.32 + <DDSElem MemberName = "input_width" MemberType = "unsigned int" Type = "Parm" Value = "INPUT_WIDTH" /> 16.33 + <DDSElem MemberName = "output_width" MemberType = "unsigned int" Type = "Parm" Value = "OUTPUT_WIDTH" /> 16.34 + <DDSElem MemberName = "intr_enable" MemberType = "unsigned int" Type = "Parm" Value = "IRQ_MODE" /> 16.35 + <DDSElem MemberName = "prev" MemberType = "void *" Type = "uninitialized" Value = "" /> 16.36 + <DDSElem MemberName = "next" MemberType = "void *" Type = "uninitialized" Value = "" /> 16.37 + </DDstruct> 16.38 + </DeviceDriver> 16.39 + <Files> 16.40 + <File Name="../components/gpio/rtl/verilog/gpio.v" /> 16.41 + <File Name="../components/gpio/rtl/verilog/tpio.v" /> 16.42 + </Files> 16.43 + <Parms> 16.44 + <Parm Name="InstanceName" Value="gpio" Type="string" isiname="true" Text="Instance Name"/> 16.45 + <Parm Name="BASE_ADDRESS" Value="0x80000000" Type="Integer" isba="true" Text="Base Address"/> 16.46 + <Parm Name="SIZE" Value="128" Type="Integer" issize="true" Text="Size" Enable="false"/> 16.47 + <Parm Name="ADDRESS_LOCK" Type="Define" Value="undef" Text="Lock Address"/> 16.48 + <Parm Name="DISABLE" Type="Define" Value="undef" isuse="true" Text="Disable Component"/> 16.49 + <Parm Name="OUTPUT_PORTS_ONLY" Type="define" Value="def" GROUP="XFER_MODE" Text="Output Ports Only" isparm="true" /> 16.50 + <Parm Name="INPUT_PORTS_ONLY" Type="define" Value="undef" GROUP="XFER_MODE" Text="Input Ports Only" isparm="true"/> 16.51 + <Parm Name="TRISTATE_PORTS" Type="define" Value="undef" GROUP="XFER_MODE" Text="Tristate Ports" isparm="true"/> 16.52 + <Parm Name="BOTH_INPUT_AND_OUTPUT" Type="define" Value="undef" GROUP="XFER_MODE" Text="Both Input and Output" isparm="true"/> 16.53 + <Parm Name="DATA_WIDTH" Type="Integer" ValueRange="1-32" Value="1" NotCondition="BOTH_INPUT_AND_OUTPUT" Text="Data Width" isparm="true"/> 16.54 + <Parm Name="INPUT_WIDTH" Type="Integer" ValueRange="1-32" Value="1" Condition="BOTH_INPUT_AND_OUTPUT" Text="Input Width" isparm="true"/> 16.55 + <Parm Name="OUTPUT_WIDTH" Type="Integer" ValueRange="1-32" Value="1" Condition="BOTH_INPUT_AND_OUTPUT" Text="Output Width" isparm="true"/> 16.56 + <Parm Name="IRQ_MODE" Type="define" Value="undef" Text="IRQ Mode" isparm="true"/> 16.57 + <Parm Name="LEVEL" Type="define" Value="undef" GROUP="IMODE" Condition="IRQ_MODE" Text="Level" isparm="true"/> 16.58 + <Parm Name="EDGE" Type="define" Value="def" GROUP="IMODE" Condition="IRQ_MODE" Text="Edge" isparm="true"/> 16.59 + <Parm Name="EITHER_EDGE_IRQ" Type="define" Value="undef" Group="EMODE" Condition="EDGE" Text="Either Edge" isparm="true"/> 16.60 + <Parm Name="POSE_EDGE_IRQ" Type="define" Value="def" Group="EMODE" Condition="EDGE" Text="Postive Edge" isparm="true"/> 16.61 + <Parm Name="NEGE_EDGE_IRQ" Type="define" Value="undef" Group="EMODE" Condition="EDGE" Text="Negative Edge" isparm="true"/> 16.62 + </Parms> 16.63 + <GUIS Columns="2" Help="component_help\lm32.htm" Name="GPIO"> 16.64 + <GUI Widget="Text" Span="1" Name="InstanceName" Width="40"/> 16.65 + <GUI Widget="Text" Span="1" Name="BASE_ADDRESS"/> 16.66 + <GUI Widget="Group" Span="1" Name="XFER_MODE" Text="Port Types" Columns="1"/> 16.67 + <GUI Widget="Radio" Span="1" Name="OUTPUT_PORTS_ONLY"/> 16.68 + <GUI Widget="Radio" Span="1" Name="INPUT_PORTS_ONLY"/> 16.69 + <GUI Widget="Radio" Span="1" Name="TRISTATE_PORTS"/> 16.70 + <GUI Widget="Radio" Span="1" Name="BOTH_INPUT_AND_OUTPUT"/> 16.71 + 16.72 + <GUI Widget="Group" Span="1" Text="Port Width" Columns="2"/> 16.73 + <GUI Widget="Spinner" Span="1" Name="DATA_WIDTH"/> 16.74 + <GUI Widget="Spinner" Span="1" Name="INPUT_WIDTH"/> 16.75 + <GUI Widget="Spinner" Span="1" Name="OUTPUT_WIDTH"/> 16.76 + 16.77 + <GUI Widget="Group" Span="1" Name="IRQ_MODE" Text="IRQ Mode" Columns="1"/> 16.78 + <GUI Widget="Check" Span="1" Name="IRQ_MODE"/> 16.79 + <GUI Widget="Radio" Span="1" Name="LEVEL"/> 16.80 + <GUI Widget="Radio" Span="1" Name="EDGE"/> 16.81 + 16.82 + <GUI Widget="Group" Span="1" Text="Edge Response" Columns="1"/> 16.83 + <GUI Widget="Radio" Span="1" Name="EITHER_EDGE_IRQ"/> 16.84 + <GUI Widget="Radio" Span="1" Name="POSE_EDGE_IRQ"/> 16.85 + <GUI Widget="Radio" Span="1" Name="NEGE_EDGE_IRQ"/> 16.86 + </GUIS> 16.87 +</Component>
17.1 diff -r 000000000000 -r 267b5a25932f rtl/verilog/gpio.v 17.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 17.3 +++ b/rtl/verilog/gpio.v Fri Aug 13 10:41:29 2010 +0100 17.4 @@ -0,0 +1,379 @@ 17.5 +// ============================================================================= 17.6 +// COPYRIGHT NOTICE 17.7 +// Copyright 2004 (c) Lattice Semiconductor Corporation 17.8 +// ALL RIGHTS RESERVED 17.9 +// This confidential and proprietary software may be used only as authorised by 17.10 +// a licensing agreement from Lattice Semiconductor Corporation. 17.11 +// The entire notice above must be reproduced on all authorized copies and 17.12 +// copies may only be made to the extent permitted by a licensing agreement from 17.13 +// Lattice Semiconductor Corporation. 17.14 +// 17.15 +// Lattice Semiconductor Corporation TEL : 1-800-Lattice (USA and Canada) 17.16 +// 5555 NE Moore Court 408-826-6000 (other locations) 17.17 +// Hillsboro, OR 97124 web : http://www.latticesemi.com/ 17.18 +// U.S.A email: techsupport@latticesemi.com 17.19 +// =============================================================================/ 17.20 +// FILE DETAILS 17.21 +// Project : GPIO for LM32 17.22 +// File : gpio.v 17.23 +// Title : General Purpose IO Component 17.24 +// Dependencies : system_conf.v 17.25 +// Description : Implements the logic to interface general purpuse IO with 17.26 +// Wishbone bus. 17.27 +// ============================================================================= 17.28 +// REVISION HISTORY 17.29 +// Version : 7.0 17.30 +// Mod. Date : Jun 27, 2005 17.31 +// Changes Made : Initial Creation 17.32 +// 17.33 +// Version : 7.0SP2, 3.0 17.34 +// Mod. Date : 20 Nov. 2007 17.35 +// Changes Made : Code clean up. 17.36 +// 17.37 +// Version : 3.1 17.38 +// Mod. Date : 11 Oct. 2008 17.39 +// Changes Made : Update the Edge Capture Register clean method 17.40 +// Make IRQ Mask register readable 17.41 +// ============================================================================= 17.42 +`ifndef GPIO_V 17.43 +`define GPIO_V 17.44 +`timescale 1ns/100 ps 17.45 +`include "system_conf.v" 17.46 +module gpio #(parameter DATA_WIDTH = 16, 17.47 + parameter INPUT_WIDTH = 16, 17.48 + parameter OUTPUT_WIDTH = 16, 17.49 + parameter IRQ_MODE = 0, 17.50 + parameter LEVEL = 0, 17.51 + parameter EDGE = 0, 17.52 + parameter POSE_EDGE_IRQ = 0, 17.53 + parameter NEGE_EDGE_IRQ = 0, 17.54 + parameter EITHER_EDGE_IRQ = 0, 17.55 + parameter INPUT_PORTS_ONLY = 1, 17.56 + parameter OUTPUT_PORTS_ONLY = 0, 17.57 + parameter BOTH_INPUT_AND_OUTPUT = 0, 17.58 + parameter TRISTATE_PORTS = 0) 17.59 + ( 17.60 + //system clock and reset 17.61 + CLK_I, 17.62 + RST_I, 17.63 + //wishbone interface signals 17.64 + GPIO_ADR_I, 17.65 + GPIO_CYC_I, 17.66 + GPIO_DAT_I, 17.67 + GPIO_SEL_I, 17.68 + GPIO_STB_I, 17.69 + GPIO_WE_I, 17.70 + GPIO_LOCK_I, 17.71 + GPIO_CTI_I, 17.72 + GPIO_BTE_I, 17.73 + GPIO_ACK_O, 17.74 + GPIO_RTY_O, 17.75 + GPIO_DAT_O, 17.76 + GPIO_ERR_O, 17.77 + IRQ_O, //bit_or of all IRQs 17.78 + //PIO side 17.79 + PIO_IN, 17.80 + PIO_OUT, 17.81 + PIO_IO, 17.82 + PIO_BOTH_IN, 17.83 + PIO_BOTH_OUT 17.84 + ); 17.85 + 17.86 +//--------------------------------------------------------------------- 17.87 +// inputs 17.88 + // 17.89 + input CLK_I; 17.90 + input RST_I; 17.91 + input [31:0] GPIO_ADR_I; 17.92 + input GPIO_CYC_I; 17.93 + input [31:0] GPIO_DAT_I; 17.94 + input [3:0] GPIO_SEL_I; 17.95 + input GPIO_STB_I; 17.96 + input GPIO_WE_I; 17.97 + input GPIO_LOCK_I; 17.98 + input [2:0] GPIO_CTI_I; 17.99 + input [1:0] GPIO_BTE_I; 17.100 + input [DATA_WIDTH-1:0] PIO_IN; 17.101 + input [INPUT_WIDTH-1:0] PIO_BOTH_IN; 17.102 +//--------------------------------------------------------------------- 17.103 +// outputs 17.104 +// 17.105 + output GPIO_ACK_O; 17.106 + output GPIO_RTY_O; 17.107 + output [31:0] GPIO_DAT_O; 17.108 + output GPIO_ERR_O; 17.109 + output IRQ_O; 17.110 + output [DATA_WIDTH-1:0] PIO_OUT; 17.111 + output [OUTPUT_WIDTH-1:0] PIO_BOTH_OUT; 17.112 +//---------------- 17.113 +//inout mode 17.114 + inout [DATA_WIDTH-1:0] PIO_IO; 17.115 +//---------------- 17.116 +//process 17.117 + 17.118 + parameter UDLY = 1; 17.119 + 17.120 + wire ADR_0; 17.121 + wire ADR_4; 17.122 + wire ADR_8; 17.123 + wire ADR_C; 17.124 + wire read_addr_0; 17.125 + wire read_addr_4; 17.126 + wire read_addr_8; 17.127 + wire read_addr_C; 17.128 + wire GPIO_RTY_O; 17.129 + wire GPIO_ERR_O; 17.130 + wire [31:0] GPIO_DAT_O; 17.131 + wire IRQ_O; 17.132 + wire [DATA_WIDTH-1:0] PIO_OUT; 17.133 + wire [OUTPUT_WIDTH-1:0] PIO_BOTH_OUT; 17.134 + wire [DATA_WIDTH-1:0] tpio_out; 17.135 + wire PIO_DATA_WR_EN; 17.136 + wire PIO_TRI_WR_EN; 17.137 + wire IRQ_MASK_WR_EN; 17.138 + wire EDGE_CAP_WR_EN; 17.139 + wire PIO_DATA_RE_EN; 17.140 + wire PIO_TRI_RE_EN; 17.141 + wire IRQ_MASK_RE_EN; 17.142 + wire [DATA_WIDTH-1:0] IRQ_TRI_TEMP; 17.143 + reg [DATA_WIDTH-1:0] PIO_DATA; 17.144 + reg [DATA_WIDTH-1:0] IRQ_MASK; 17.145 + reg [INPUT_WIDTH-1:0] IRQ_MASK_BOTH; 17.146 + reg [DATA_WIDTH-1:0] IRQ_TEMP; 17.147 + reg [INPUT_WIDTH-1:0] IRQ_TEMP_BOTH; 17.148 + reg [DATA_WIDTH-1:0] EDGE_CAPTURE; 17.149 + reg [INPUT_WIDTH-1:0] EDGE_CAPTURE_BOTH; 17.150 + reg [DATA_WIDTH-1:0] PIO_DATA_DLY; 17.151 + reg [INPUT_WIDTH-1:0] PIO_DATA_DLY_BOTH; 17.152 + reg [OUTPUT_WIDTH-1:0] PIO_DATAO; 17.153 + reg [INPUT_WIDTH-1 :0] PIO_DATAI; 17.154 + reg GPIO_ACK_O; 17.155 + 17.156 + assign GPIO_RTY_O = 1'b0; 17.157 + assign GPIO_ERR_O = 1'b0; 17.158 + assign ADR_0 = (GPIO_ADR_I[3:0] == 4'b0000 ? 1'b1 : 0); // IO Data 17.159 + assign ADR_4 = (GPIO_ADR_I[3:0] == 4'b0100 ? 1'b1 : 0); // Tri-state Control 17.160 + assign ADR_8 = (GPIO_ADR_I[3:0] == 4'b1000 ? 1'b1 : 0); // IRQ Mask 17.161 + assign ADR_C = (GPIO_ADR_I[3:0] == 4'b1100 ? 1'b1 : 0); // Edge Capture 17.162 + assign read_addr_0 = (ADR_0 & GPIO_STB_I & ~GPIO_WE_I) ; 17.163 + assign read_addr_4 = (ADR_4 & GPIO_STB_I & ~GPIO_WE_I) ; 17.164 + assign read_addr_8 = (IRQ_MODE == 1 && (ADR_8 & GPIO_STB_I & ~GPIO_WE_I)); 17.165 + assign read_addr_C = (IRQ_MODE == 1 && (ADR_C & GPIO_STB_I & ~GPIO_WE_I)); 17.166 + 17.167 + always @(posedge CLK_I or posedge RST_I) 17.168 + if(RST_I) 17.169 + GPIO_ACK_O <= #UDLY 1'b0; 17.170 + else if( GPIO_STB_I && !GPIO_ACK_O) 17.171 + GPIO_ACK_O <= #UDLY 1'b1; 17.172 + else 17.173 + GPIO_ACK_O <= #UDLY 1'b0; 17.174 + 17.175 + generate 17.176 + if (INPUT_PORTS_ONLY == 1) begin 17.177 + always @(posedge CLK_I or posedge RST_I) 17.178 + if (RST_I) 17.179 + PIO_DATA <= #UDLY 0; 17.180 + else if (GPIO_STB_I && !GPIO_ACK_O && !GPIO_WE_I && ADR_0 == 1'b1 && GPIO_SEL_I == 4'b1111) 17.181 + PIO_DATA <= #UDLY PIO_IN; 17.182 + end 17.183 + endgenerate 17.184 + 17.185 + generate 17.186 + if (OUTPUT_PORTS_ONLY == 1) begin 17.187 + always @(posedge CLK_I or posedge RST_I) 17.188 + if (RST_I) 17.189 + PIO_DATA <= #UDLY 0; 17.190 + else if (GPIO_STB_I && !GPIO_ACK_O && GPIO_WE_I && ADR_0 == 1'b1 && GPIO_SEL_I == 4'b1111) 17.191 + PIO_DATA <= #UDLY GPIO_DAT_I[DATA_WIDTH-1:0]; 17.192 + 17.193 + assign PIO_OUT = PIO_DATA; 17.194 + end 17.195 + endgenerate 17.196 + 17.197 + generate 17.198 + if (BOTH_INPUT_AND_OUTPUT == 1) begin 17.199 + always @(posedge CLK_I or posedge RST_I) 17.200 + if (RST_I) begin 17.201 + PIO_DATAI <= #UDLY 0; 17.202 + PIO_DATAO <= #UDLY 0; 17.203 + end else if (GPIO_STB_I && !GPIO_ACK_O && !GPIO_WE_I && (ADR_0 == 1'b1) && GPIO_SEL_I == 4'b1111) 17.204 + PIO_DATAI <= #UDLY PIO_BOTH_IN; 17.205 + else if (GPIO_STB_I && GPIO_ACK_O && GPIO_WE_I && (ADR_0 == 1'b1) && GPIO_SEL_I == 4'b1111) 17.206 + PIO_DATAO <= #UDLY GPIO_DAT_I[OUTPUT_WIDTH-1:0]; 17.207 + 17.208 + assign PIO_BOTH_OUT = PIO_DATAO[OUTPUT_WIDTH-1:0]; 17.209 + end 17.210 + endgenerate 17.211 + 17.212 + assign PIO_DATA_RE_EN = GPIO_STB_I && !GPIO_ACK_O && !GPIO_WE_I && (ADR_0 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.213 + assign PIO_TRI_RE_EN = GPIO_STB_I && GPIO_ACK_O && !GPIO_WE_I && (ADR_4 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.214 + assign IRQ_MASK_RE_EN = GPIO_STB_I && GPIO_ACK_O && !GPIO_WE_I && (ADR_8 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.215 + assign PIO_DATA_WR_EN = GPIO_STB_I && GPIO_ACK_O && GPIO_WE_I && (ADR_0 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.216 + assign PIO_TRI_WR_EN = GPIO_STB_I && GPIO_ACK_O && GPIO_WE_I && (ADR_4 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.217 + assign IRQ_MASK_WR_EN = GPIO_STB_I && GPIO_ACK_O && GPIO_WE_I && (ADR_8 == 1'b1) && GPIO_SEL_I == 4'b1111; 17.218 + assign EDGE_CAP_WR_EN = GPIO_STB_I && GPIO_ACK_O && GPIO_WE_I && (ADR_C == 1'b1) && GPIO_SEL_I == 4'b1111; 17.219 + 17.220 + generate 17.221 + genvar ti; 17.222 + for (ti = 0 ; ti < DATA_WIDTH; ti = ti + 1) 17.223 + begin : tio_inst 17.224 + TRI_PIO #(.DATA_WIDTH(DATA_WIDTH), 17.225 + .IRQ_MODE(IRQ_MODE), 17.226 + .LEVEL(LEVEL), 17.227 + .EDGE(EDGE), 17.228 + .POSE_EDGE_IRQ(POSE_EDGE_IRQ), 17.229 + .NEGE_EDGE_IRQ(NEGE_EDGE_IRQ), 17.230 + .EITHER_EDGE_IRQ(EITHER_EDGE_IRQ)) 17.231 + TP (.CLK_I(CLK_I), 17.232 + .RST_I(RST_I), 17.233 + .DAT_I(GPIO_DAT_I[ti]), 17.234 + .DAT_O(tpio_out[ti]), 17.235 + .PIO_IO(PIO_IO[ti]), 17.236 + .IRQ_O(IRQ_TRI_TEMP[ti]), 17.237 + .PIO_TRI_WR_EN(PIO_TRI_WR_EN), 17.238 + .PIO_TRI_RE_EN(PIO_TRI_RE_EN), 17.239 + .PIO_DATA_WR_EN(PIO_DATA_WR_EN), 17.240 + .PIO_DATA_RE_EN(PIO_DATA_RE_EN), 17.241 + .IRQ_MASK_WR_EN(IRQ_MASK_WR_EN), 17.242 + .IRQ_MASK_RE_EN(IRQ_MASK_RE_EN), 17.243 + .EDGE_CAP_WR_EN(EDGE_CAP_WR_EN)); 17.244 + end 17.245 + endgenerate 17.246 + 17.247 + generate 17.248 + if (INPUT_PORTS_ONLY == 1) 17.249 + assign GPIO_DAT_O = read_addr_0 ? PIO_DATA : 17.250 + read_addr_8 ? IRQ_MASK : 17.251 + read_addr_C ? EDGE_CAPTURE : 17.252 + 0; 17.253 + else if (BOTH_INPUT_AND_OUTPUT == 1) 17.254 + assign GPIO_DAT_O = read_addr_0 ? PIO_DATAI : 17.255 + read_addr_8 ? IRQ_MASK_BOTH : 17.256 + read_addr_C ? EDGE_CAPTURE_BOTH : 17.257 + 0; 17.258 + else if (TRISTATE_PORTS == 1) 17.259 + assign GPIO_DAT_O = read_addr_0 ? tpio_out : 17.260 + read_addr_4 ? tpio_out : 17.261 + read_addr_8 ? tpio_out : 17.262 + read_addr_C ? IRQ_TRI_TEMP : 17.263 + 0; 17.264 + else 17.265 + assign GPIO_DAT_O = 0; 17.266 + endgenerate 17.267 + 17.268 +//----------------------------------------------------------------------------- 17.269 +//-------------------------------IRQ Generation-------------------------------- 17.270 +//----------------------------------------------------------------------------- 17.271 + generate 17.272 + if (IRQ_MODE == 1) begin 17.273 + always @(posedge CLK_I or posedge RST_I) 17.274 + if (RST_I) begin 17.275 + IRQ_MASK <= #UDLY 0; 17.276 + IRQ_MASK_BOTH <= #UDLY 0; 17.277 + end else if (IRQ_MASK_WR_EN) begin 17.278 + IRQ_MASK <= #UDLY GPIO_DAT_I[DATA_WIDTH-1:0]; 17.279 + IRQ_MASK_BOTH <= #UDLY GPIO_DAT_I[INPUT_WIDTH-1:0]; 17.280 + end 17.281 + end 17.282 + endgenerate 17.283 + 17.284 + generate 17.285 + //-------------------------------- 17.286 + //--INPUT_PORTS_ONLY MODE IRQ 17.287 + //-------------------------------- 17.288 + if (IRQ_MODE == 1 && INPUT_PORTS_ONLY == 1 && LEVEL == 1) begin 17.289 + //level mode IRQ 17.290 + always @(posedge CLK_I or posedge RST_I) 17.291 + if (RST_I) 17.292 + IRQ_TEMP <= #UDLY 0; 17.293 + else if (IRQ_MASK_WR_EN) 17.294 + IRQ_TEMP <= #UDLY IRQ_TEMP & GPIO_DAT_I[DATA_WIDTH-1:0]; 17.295 + else 17.296 + IRQ_TEMP <= #UDLY PIO_IN & IRQ_MASK;//bit-and 17.297 + assign IRQ_O = |IRQ_TEMP; 17.298 + end else if (IRQ_MODE == 1 && INPUT_PORTS_ONLY == 1 && EDGE == 1) begin 17.299 + always @(posedge CLK_I or posedge RST_I) 17.300 + if (RST_I) 17.301 + PIO_DATA_DLY <= #UDLY 0; 17.302 + else 17.303 + PIO_DATA_DLY <= PIO_IN; 17.304 + 17.305 + // edge-capture register bits are treated as individual bits. 17.306 + genvar i; 17.307 + for( i = 0; i < DATA_WIDTH; i = i + 1) 17.308 + begin 17.309 + always @(posedge CLK_I or posedge RST_I) 17.310 + if (RST_I) 17.311 + EDGE_CAPTURE[i] <= #UDLY 0; 17.312 + else if (|(PIO_IN[i] & ~PIO_DATA_DLY[i]) && (POSE_EDGE_IRQ == 1)) 17.313 + EDGE_CAPTURE[i] <= #UDLY PIO_IN[i] & ~PIO_DATA_DLY[i]; 17.314 + else if (|(~PIO_IN[i] & PIO_DATA_DLY[i]) && (NEGE_EDGE_IRQ == 1)) 17.315 + EDGE_CAPTURE[i] <= #UDLY ~PIO_IN[i] & PIO_DATA_DLY[i]; 17.316 + else if (|(PIO_IN[i] & ~PIO_DATA_DLY[i]) && (EITHER_EDGE_IRQ == 1)) 17.317 + EDGE_CAPTURE[i] <= #UDLY PIO_IN[i] & ~PIO_DATA_DLY[i]; 17.318 + else if (|(~PIO_IN[i] & PIO_DATA_DLY[i]) && (EITHER_EDGE_IRQ == 1)) 17.319 + EDGE_CAPTURE[i] <= #UDLY ~PIO_IN[i] & PIO_DATA_DLY[i]; 17.320 + else if ( (~IRQ_MASK[i]) & GPIO_DAT_I[i] & IRQ_MASK_WR_EN ) 17.321 + // interrupt mask is being set, so clear edge-capture 17.322 + EDGE_CAPTURE[i] <= #UDLY 0; 17.323 + else if (EDGE_CAP_WR_EN) 17.324 + // user's writing to the edge register, so update edge capture 17.325 + // register 17.326 + EDGE_CAPTURE[i] <= #UDLY EDGE_CAPTURE[i] & GPIO_DAT_I[i]; 17.327 + end 17.328 + assign IRQ_O = |(EDGE_CAPTURE & IRQ_MASK); 17.329 + 17.330 + //---------------------------------- 17.331 + //--BOTH_INPUT_AND_OUTPUT MODE IRQ 17.332 + //---------------------------------- 17.333 + end else if (IRQ_MODE == 1 && BOTH_INPUT_AND_OUTPUT == 1 && LEVEL == 1) begin 17.334 + always @(posedge CLK_I or posedge RST_I) 17.335 + if (RST_I) 17.336 + IRQ_TEMP_BOTH <= #UDLY 0; 17.337 + else if (IRQ_MASK_WR_EN) 17.338 + IRQ_TEMP_BOTH <= #UDLY IRQ_TEMP_BOTH & GPIO_DAT_I[INPUT_WIDTH-1:0]; 17.339 + else 17.340 + IRQ_TEMP_BOTH <= #UDLY PIO_BOTH_IN & IRQ_MASK_BOTH; 17.341 + assign IRQ_O = |IRQ_TEMP_BOTH; 17.342 + 17.343 + //edge mode IRQ 17.344 + end else if (IRQ_MODE == 1 && BOTH_INPUT_AND_OUTPUT == 1 && EDGE == 1) begin 17.345 + always @(posedge CLK_I or posedge RST_I) 17.346 + if (RST_I) 17.347 + PIO_DATA_DLY_BOTH <= #UDLY 0; 17.348 + else 17.349 + PIO_DATA_DLY_BOTH <= PIO_BOTH_IN; 17.350 + 17.351 + // edge-capture register bits are treated as individual bits. 17.352 + genvar i_both; 17.353 + for( i_both = 0; i_both < INPUT_WIDTH; i_both = i_both + 1) 17.354 + begin 17.355 + always @(posedge CLK_I or posedge RST_I) 17.356 + if (RST_I) 17.357 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY 0; 17.358 + else if (|(PIO_BOTH_IN[i_both] & ~PIO_DATA_DLY_BOTH[i_both]) && POSE_EDGE_IRQ == 1) 17.359 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY PIO_BOTH_IN[i_both] & ~PIO_DATA_DLY_BOTH[i_both]; 17.360 + else if (|(~PIO_BOTH_IN[i_both] & PIO_DATA_DLY_BOTH[i_both]) && NEGE_EDGE_IRQ == 1) 17.361 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY ~PIO_BOTH_IN[i_both] & PIO_DATA_DLY_BOTH[i_both]; 17.362 + else if (|(PIO_BOTH_IN[i_both] & ~PIO_DATA_DLY_BOTH[i_both]) && EITHER_EDGE_IRQ == 1) 17.363 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY PIO_BOTH_IN[i_both] & ~PIO_DATA_DLY_BOTH[i_both]; 17.364 + else if (|(~PIO_BOTH_IN[i_both] & PIO_DATA_DLY_BOTH[i_both]) && EITHER_EDGE_IRQ == 1) 17.365 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY ~PIO_BOTH_IN[i_both] & PIO_DATA_DLY_BOTH[i_both]; 17.366 + else if ( (~IRQ_MASK_BOTH[i_both]) & GPIO_DAT_I[i_both] & IRQ_MASK_WR_EN ) 17.367 + // interrupt mask is being set, so clear edge-capture 17.368 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY 0; 17.369 + else if (EDGE_CAP_WR_EN) 17.370 + // user's writing to the edge register, so update edge capture 17.371 + // register 17.372 + EDGE_CAPTURE_BOTH[i_both] <= #UDLY EDGE_CAPTURE_BOTH[i_both] & GPIO_DAT_I[i_both]; 17.373 + end 17.374 + assign IRQ_O = |(EDGE_CAPTURE_BOTH & IRQ_MASK_BOTH); 17.375 + 17.376 + end else if (IRQ_MODE == 1 && TRISTATE_PORTS == 1) begin 17.377 + assign IRQ_O = |IRQ_TRI_TEMP; 17.378 + end else 17.379 + assign IRQ_O = 1'b0; 17.380 + endgenerate 17.381 + 17.382 +endmodule 17.383 +`endif // GPIO_V
18.1 diff -r 000000000000 -r 267b5a25932f rtl/verilog/tpio.v 18.2 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 18.3 +++ b/rtl/verilog/tpio.v Fri Aug 13 10:41:29 2010 +0100 18.4 @@ -0,0 +1,168 @@ 18.5 +// ============================================================================= 18.6 +// COPYRIGHT NOTICE 18.7 +// Copyright 2006 (c) Lattice Semiconductor Corporation 18.8 +// ALL RIGHTS RESERVED 18.9 +// This confidential and proprietary software may be used only as authorised by 18.10 +// a licensing agreement from Lattice Semiconductor Corporation. 18.11 +// The entire notice above must be reproduced on all authorized copies and 18.12 +// copies may only be made to the extent permitted by a licensing agreement from 18.13 +// Lattice Semiconductor Corporation. 18.14 +// 18.15 +// Lattice Semiconductor Corporation TEL : 1-800-Lattice (USA and Canada) 18.16 +// 5555 NE Moore Court 408-826-6000 (other locations) 18.17 +// Hillsboro, OR 97124 web : http://www.latticesemi.com/ 18.18 +// U.S.A email: techsupport@latticesemi.com 18.19 +// ============================================================================/ 18.20 +// FILE DETAILS 18.21 +// FILE DETAILS 18.22 +// Project : GPIO for LM32 18.23 +// File : tpio.v 18.24 +// Title : Tri State IO control 18.25 +// Dependencies : system_conf.v 18.26 +// Description : Implements the logic to interface tri-state IO with 18.27 +// Wishbone bus. 18.28 +// ============================================================================= 18.29 +// REVISION HISTORY 18.30 +// Version : 7.0 18.31 +// Mod. Date : Jun 27, 2005 18.32 +// Changes Made : Initial Creation 18.33 +// 18.34 +// Version : 7.0SP2, 3.0 18.35 +// Mod. Date : 20 Nov. 2007 18.36 +// Changes Made : Code clean up and add the BB for the inout port. 18.37 +// 18.38 +// Version : 3.1 18.39 +// Mod. Date : 11 Oct. 2008 18.40 +// Changes Made : Update the Edge Capture Register clean method 18.41 +// Make IRQ Mask register readable 18.42 +// ============================================================================= 18.43 +`ifndef TPIO_V 18.44 +`define TPIO_V 18.45 +`timescale 1ns/100 ps 18.46 +`include "system_conf.v" 18.47 +module TRI_PIO #(parameter DATA_WIDTH = 16, 18.48 + parameter IRQ_MODE = 1, 18.49 + parameter LEVEL = 0, 18.50 + parameter EDGE = 1, 18.51 + parameter POSE_EDGE_IRQ = 1, 18.52 + parameter NEGE_EDGE_IRQ = 0, 18.53 + parameter EITHER_EDGE_IRQ = 0) 18.54 + (RST_I, 18.55 + CLK_I, 18.56 + DAT_I, 18.57 + DAT_O, 18.58 + PIO_IO, 18.59 + IRQ_O, 18.60 + PIO_TRI_WR_EN, 18.61 + PIO_TRI_RE_EN, 18.62 + PIO_DATA_RE_EN, 18.63 + PIO_DATA_WR_EN, 18.64 + IRQ_MASK_RE_EN, 18.65 + IRQ_MASK_WR_EN, 18.66 + EDGE_CAP_WR_EN); 18.67 + 18.68 + parameter UDLY = 1;//user delay 18.69 + 18.70 + input RST_I; 18.71 + input CLK_I; 18.72 + input DAT_I; 18.73 + input PIO_TRI_RE_EN; 18.74 + input PIO_TRI_WR_EN; 18.75 + input PIO_DATA_RE_EN; 18.76 + input PIO_DATA_WR_EN; 18.77 + output DAT_O; 18.78 + input IRQ_MASK_RE_EN; 18.79 + input IRQ_MASK_WR_EN; 18.80 + input EDGE_CAP_WR_EN; 18.81 + output IRQ_O; 18.82 + inout PIO_IO; 18.83 + 18.84 + wire PIO_IO_I; 18.85 + wire DAT_O; 18.86 + wire IRQ_O; 18.87 + reg PIO_DATA_O; 18.88 + reg PIO_DATA_I; 18.89 + reg PIO_TRI; 18.90 + reg IRQ_MASK; 18.91 + reg IRQ_TEMP; 18.92 + reg EDGE_CAPTURE; 18.93 + reg PIO_DATA_DLY; 18.94 + 18.95 + always @(posedge CLK_I or posedge RST_I) 18.96 + if (RST_I) 18.97 + PIO_TRI <= #UDLY 0; 18.98 + else if (PIO_TRI_WR_EN) 18.99 + PIO_TRI <= #UDLY DAT_I; 18.100 + 18.101 + always @(posedge CLK_I or posedge RST_I) 18.102 + if (RST_I) 18.103 + PIO_DATA_O <= #UDLY 0; 18.104 + else if (PIO_DATA_WR_EN) 18.105 + PIO_DATA_O <= #UDLY DAT_I; 18.106 + 18.107 + always @(posedge CLK_I or posedge RST_I) 18.108 + if (RST_I) 18.109 + PIO_DATA_I <= #UDLY 0; 18.110 + else if (PIO_DATA_RE_EN) 18.111 + PIO_DATA_I <= #UDLY PIO_IO_I; 18.112 + 18.113 + BB tpio_inst(.I(PIO_DATA_O), .T(~PIO_TRI), .O(PIO_IO_I), .B(PIO_IO)); 18.114 + assign DAT_O = PIO_TRI_RE_EN ? PIO_TRI : 18.115 + IRQ_MASK_RE_EN ? IRQ_MASK : PIO_DATA_I; 18.116 + 18.117 + //IRQ_MODE 18.118 + 18.119 + generate 18.120 + if (IRQ_MODE == 1) begin 18.121 + //CONFIG THE IRQ_MASK REG. 18.122 + always @(posedge CLK_I or posedge RST_I) 18.123 + if (RST_I) 18.124 + IRQ_MASK <= #UDLY 0; 18.125 + else if (IRQ_MASK_WR_EN) 18.126 + IRQ_MASK <= #UDLY DAT_I; 18.127 + end 18.128 + endgenerate 18.129 + 18.130 + generate 18.131 + if (IRQ_MODE == 1 && LEVEL == 1) begin 18.132 + always @(posedge CLK_I or posedge RST_I) 18.133 + if (RST_I) 18.134 + IRQ_TEMP <= #UDLY 0; 18.135 + else 18.136 + IRQ_TEMP <= #UDLY PIO_IO_I & IRQ_MASK & ~PIO_TRI;//bit-and 18.137 + assign IRQ_O = IRQ_TEMP; 18.138 + end 18.139 + else if (IRQ_MODE == 1 && EDGE == 1) begin 18.140 + always @(posedge CLK_I or posedge RST_I) 18.141 + if (RST_I) 18.142 + PIO_DATA_DLY <= #UDLY 0; 18.143 + else 18.144 + PIO_DATA_DLY <= PIO_IO_I; 18.145 + 18.146 + always @(posedge CLK_I or posedge RST_I) 18.147 + if (RST_I) 18.148 + EDGE_CAPTURE <= #UDLY 0; 18.149 + else if ((PIO_IO_I & ~PIO_DATA_DLY & ~PIO_TRI) && POSE_EDGE_IRQ == 1) 18.150 + EDGE_CAPTURE <= #UDLY PIO_IO_I & ~PIO_DATA_DLY; 18.151 + else if ((~PIO_IO_I & PIO_DATA_DLY & ~PIO_TRI) && NEGE_EDGE_IRQ == 1) 18.152 + EDGE_CAPTURE <= #UDLY ~PIO_IO_I & PIO_DATA_DLY; 18.153 + else if ((PIO_IO_I & ~PIO_DATA_DLY & ~PIO_TRI) && EITHER_EDGE_IRQ == 1) 18.154 + EDGE_CAPTURE <= #UDLY PIO_IO_I & ~PIO_DATA_DLY; 18.155 + else if ((~PIO_IO_I & PIO_DATA_DLY & ~PIO_TRI) && EITHER_EDGE_IRQ == 1) 18.156 + EDGE_CAPTURE <= #UDLY ~PIO_IO_I & PIO_DATA_DLY; 18.157 + else if ( (~IRQ_MASK) & DAT_I & IRQ_MASK_WR_EN ) 18.158 + // interrupt mask's being set, so clear edge-capture 18.159 + EDGE_CAPTURE <= #UDLY 0; 18.160 + else if ( EDGE_CAP_WR_EN ) 18.161 + // user's writing to the edge-register, so update edge-capture 18.162 + // register 18.163 + EDGE_CAPTURE <= #UDLY EDGE_CAPTURE & DAT_I; 18.164 + 18.165 + assign IRQ_O = |(EDGE_CAPTURE & IRQ_MASK); 18.166 + end 18.167 + else // IRQ_MODE ==0 18.168 + assign IRQ_O = 0; 18.169 + endgenerate 18.170 +endmodule 18.171 +`endif // TPIO_V 18.172 +
